SANTA CLARA, Calif.--Integrated Device Technology Inc. (IDT) here announced enhanced versions of its SuperSync II family of first-in/first-out (FIFO) memory chips with higher-speed configurations.
IDT's new 36-bit FIFOs operate at 133 MHz, making them suitable for high-bandwidth and data requirements in such applications as Gigabit Ethernet switches and terabit routers, according to the company. The new SuperSync II FIFOs are designed to complete IDT's offering of 9-bit and 18-bit devices, which are also available at speeds up to 133 MHz. IDT's FIFOs range in density from 16-kilobits to 4-megabits.
IDT said its portfolio of SuperSync II now covers 9-, 18-, 36- and 72-bit devices, all reaching densities up to 4 Mbits. Along with flexibility in size, SuperSync II FIFOs offers bus-matching capabilities to provide a seamless bridge between two systems operating at different data widths, said the Santa Clara company. This allows users to set input and output word sizes to and from the FIFO, independently, according to IDT.
Other key features include: big-endian/little-endian user-selectable byte representation; low-power consumption; eight pre-selected default offsets for the programmable almost-empty and almost-full flags; optional first-word-fall-through or IDT standard timing modes; low first-word latency; and re-transmit and partial-reset capabilities that allow designers to debug a system without having to reset the entire system.
In quantities of 10,000 units, prices for the 36-bit FIFOs range from $39.22 (for 1-K-by-36-bit configuration) to $121.24 (for 128-K-by-36-bit parts).