DALLAS -- Dallas Semiconductor Corp. today announced a 3.3-volt version of a bit error rate tester (BERT) chip for telecommunications. The full-featured BERT device is used to check the integrity of signal transmissions in telecom systems, such as multiplexers, routers, bridges, channel switching units, customer premise equipment and digital-to-analog (D/A) converters.
The new 3.3-V BERT device conforms to operating speeds from 0 to 20 MHz, compared to 52 MHz for the 5-V version, said Dallas Semiconductor. The 3.3-V DS21372 has the ability to generate loopback patterns required for T1, fractional-T1 and other communications protocols--a unit feature introduced on Dallas Semiconductor's 5-V BERT chip.
"The alternative to the BERT chip is an external test box that has to be set up and operated by a craftsperson," said Arthur Harvey, product engineer at Dallas Semiconductor. "The DS21372 works in conjunction with a microprocessor. Designed directly into a system, it provides a test resource available on demand through an existing processor. The craftsperson can then test equipment with software commands either locally or remotely, saving time and money."
In quantities of 1,000, the DS21372 sells for $7.25 each.