ATLANTA ( ChipWire) -- Motorola Inc.'s Semiconductor Products Sector will introduce a new security-processor family at the NetWorld+Interop show this week for use in networking applications. The MPC180 devices will combine encryption with general Internet Protocol Secure (IPsec) functions such as authentication and virtual private network tunnel creation.
Motorola will also debut at N+I the MPC7410, the first PowerPC device based on the G4 core that includes the MPX bus for multiprocessing applications. This part is different than the integrated-L2-cache PowerPC described at last fall's Microprocessor Forum. The 7410, like the two upgrades yet to come, will find its largest market in advanced networking and telecom applications, said Brian Wilkie, vice president and general manager of the computing-platform division at Motorola.
The binary code for both the MPC180 and the MPC7410 will be united through a common application programming interface with that of the 683XX, PowerQuicc and C-Port C-5 families. However, Clint Ramsay, vice president of marketing for Motorola's C-Port division, warned against underestimating the task of expanding the common programming environment to so many different processors.
The sum total of all Motorola processors sold into communications accounts, including such perennials as the 68302 and 68360, now exceeds 100 million shipped, Wilkie said. Motorola has long been involved in encryption and security processors for government defense and intelligence agencies, he said, but did not participate broadly in the market for commercial first-generation Data Encryption Standard chips. The rise of combined-function chips supporting IPsec made it more relevant for Motorola to offer a standard security architecture, Wilkie said.
Motorola will remain focused on edge processing, for applications such as DSL access multiplexers, integrated access devices and edge routers. Wilkie said that some residential gateway processing functions in the home-access market could be considered, though Motorola will not make the client device a critical market. A near-term exception is mobile gateways for the Wireless Application Protocol, where Motorola hopes to parlay unique experience in WAP to a gateway processor for WAP. This is where a security processor will come in handy, Wilkie said.
The MPC180 is being offered in two versions: the standard MPC180, which supports IPsec and Secure Sockets Layer; and the MPC180e, which supports WAP as well as IPsec and SSL. The chip will offer such functions as random-number generation and key generation, but is not intended to be a full packet analyzer. In some cases, it will be used alongside as many as three processors, including a main host, a network processor and what Motorola calls a "communication processor" in essence, a serial line aggregator.
The MPC180 processor, slated for sampling in early 2001, will support speeds up to OC-3 (155 Mbits/second). Motorola will offer later lines to support OC-12 (622-Mbits/s) and OC-48 (2.5 Gbits/s). Two other families will succeed the MPC180.
Motorola relies on Wind River Systems Inc. for both the VxWorks real-time environment and the WindNet IPsec stack. The processor also is optimized for elliptic-curve encryption, and Motorola will partner with a player in wireless applications for elliptic curve. While Wilkie would not identify the partner, the most likely candidate by far would be Certicom Inc.
As for the MPC7410, Wilkie said it represents the regular evolution of feature sets for the G4 core, which already had AltiVec instructions added for the first time in the MPC7400. Addition of the MPX bus was an important feature for the 7410, due to the growing use of parallel router processor architectures. It is the first such G4 chip to use Motorola's 0.18-micron copper interconnect process. The MPC7410 does not have Level 2 cache on board, something that will await the next generation, though there is an interface for external Level 2 cache.
AltiVec instructions in the new 7410 enhance its use for signal-processing applications, something encountered with increasing frequency in virtually all network applications not just wireless. The sustained on-chip bus bandwidth is 6.4 Gbits/s.
The processor dissipates 7 W at 500 MHz, utilizing a 1.8-Vcore. The first prototypes of MPC7410 have been implemented in ceramic, though Motorola is rapidly converting the 360-lead processor to plastic packaging.