SAN JOSE -- Altera Corp. here today announced a patented redundancy technique that has increased production yields on its high-density programmable logic devices by up to four times.
Altera said its silicon foundry supplier--Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC)--has used the technology to reduce defects in the company's APEX 20KE family. TSMC's 0.18-micon process and the advanced redundancy technology have enabled Altera to reduce the price of its high-density members in the APEX20KE series by 60%, according to company managers.
"TSMC's state-of-the-art 0.18-micron fabs are reaching extremely low defect densities. Combined with the benefits of our patented redundancy technology, this has dramatically increased the yield on our high-density APEX 20KE family," said Denis Berlan, chief operating officer at Altera.
Redundancy technology is widely used in the memory industry to replace defective or poorly functioning circuits with spares blocks of devices. Altera said it is the first PLD to use the technique to repair programmable logic devices. The continuous interconnect structure of the APEX 20KE architecture can be used to repair devices by mapping redundant circuitry in place of defective blocks, while maintaining device functionality and timing specifications, according to Altera.
Altera said it is now selling the APEX EP20K1000E and EP20K1500E devices for $995 and $1,995 each, respectively, in quantities of 100.