SAN JOSE Xilinx Inc. and Motorola Inc. today announced plans to collaborate in product development using the RapidIO interconnect architecture, which has been designed to eliminate bottlenecks in embedded systems communications between chips, boards, and backplanes.
Motorola which originally developed RapidIO with Mercury Computer Systems Inc. said it will use Xilinx field-programmable gate arrays (FPGAs) with RapidIO cores to validate its own future products using the broadband interconnect technology. Xilinx said it will use bus modules developed by Motorola to validate RapidIO cores for its new Virtex-II FPGAs.
"Broadband interconnect technology is becoming increasingly important to manufacturers of Internet infrastructure equipment. We're confident that our collaboration with Motorola will speed up our ability to deliver fully compliant RapidIO solutions to our customers who are building that new class of broadband equipment," said Babak Hedayati, marketing director for the Xilinx IP Solutions Division
RapidIO technology is being positioned as a next-generation, packet-based, switched-fabric interconnect architecture for embedded systems. The technology has been optimized for both high bandwidth and low latency, according to proponents of RapidIO. Initial implementations are expected to exceed 1.0 gigabyte-per-second throughput, based on clock rates from 250 MHz and higher.