AUSTIN, Tex. Recognizing that semiconductor process technology is changing faster than envisioned only a year or two ago, the International Technology Roadmap for Semiconductors (ITRS) has posted a 2000 update to its Web site (see http://public.itrs.net). But there is disagreement on how long the accelerated pace will continue, since troublesome delays in lithography now appear likely.
Bob Doering, one of two U.S. representatives to the International Roadmap Committee, said the 2000 update documents "the obvious reality" that production of integrated circuits at 130-nm (0.13-micron) design rules will begin in 2001, not 2002, as had been envisioned as recently as 1999.
The process technology cycles, called nodes in ITRS parlance, have accelerated from three-year cycles to two years for the 0.18-micron and 0.13-micron nodes. But "it gets fuzzier for the next node," Doering said. "The majority believe the next node will come in 2003, others later. But there is a little bit of division, and not all may go along with the timing for the 100-nm node."
Not all of the ITRS working groups agreed with the aggressive thinkers who backed the so-called scenario 2.0, the most aggressive of the three possible scenarios put forward in the update. The front end processing working group, for one, cited the persistence of red flags indicating no known solution to an outstanding problem that still dot the road map for the 100-nm (0.10-micron) node, which according to scenario 2.0 could move to manufacturing in 2003.
Indeed, the ITRS is notorious for the red boxes that flag problems with "no known solution." "NKS means, 'We have no clue how to do this in a manufacturing environment,' " said Linda Wilson, the ITRS information manager who edits the road map from her post at International Sematech. "The device could be built, but it may not be manufacturable in volumes."
Mask technology is one area that is "becoming extremely critical," she said. Design and test, metrology and defect reduction also require breakthroughs.
The debates extend to the very nomenclature used to describe the technology nodes. Some are pressing for the 100-nm node to be renamed the 90-nm node, noting that the 100-nm designation is a casual one that does not accurately reflect the technological progression to the next-generation node.
The ITRS defines the year of introduction for a new technology as "the year when product shipment first exceeds 10,000 units per month of ICs from a manufacturing site using 'production tooling.' " A second manufacturer must start production at those design rules within three months.
With 0.13-micron chips now being fabricated at several companies, it might be argued that the 130-nm node started in late 2000. But beyond the 130-nm node, the future is less clear.
As a result, the 2000 update lists three scenarios. Scenario 1, the least aggressive, envisions the 100-nm node occurring in 2005. Scenario 1.5 sees the 100-nm node arriving in 2004. The most aggressive scenario, 2.0, sees the 100-nm node's arrival in 2003 and the 90-nm node in 2004.
Scenario 2.0 represents the thinking of some U.S. and European companies. If their forecasts prove accurate, the 65-nm, 45-nm, and 33-nm, and 23-nm nodes would be realized in 2007, 2010, 2013 and 2016, respectively.
Within the 2000 update, "scenario 2 has some reasonable numbers and might be called the best-case scenario. But there is no unanimity," Doering said. "What is true is that technology is moving fast, and scenario 2 can be called the starting point of a full revision. It has the most support."
In ITRS terminology, "update" refers to limited changes, while "revision" means a new "edition" with a fuller set of changes. This year's change was an update; next year a full revision is due that will supplant the 1999 edition of the road map.
In 1999, ITRS went international in a big way. Whereas the U.S. Semiconductor Industry Association (SIA) had controlled the 1992, 1994 and 1997 editions, the 1999 road map included input from five regions: the United States, Europe, Japan, Korea and Taiwan.
There are two representatives from each region to the International Roadmap Committee (IRC), and the 10 members strive for unanimity. Doering, a strategic technology planning manager at Texas Instruments Inc., represents the United States in tandem with IRC chairman Paolo Gargini, a technology planner employed at Intel Corp.
Wilson said the IRC receives detailed information about 12 technology areas, including lithography, design and test, process integration and others. The 12 international technology working groups, (ITWGs, pronounced "eye twigs") have as many as 20 representatives each, again drawn from the five regions.
Not every ITWG was able to update its tables in time for the current update. The revised data from the ITWGs was due in July, although the update was not published (posted on the ITRS site) until Dec. 14.
Some of those ITWGs said they were unable to update their tables still sporting red and yellow flags for problems with no known solutions or partial ones because of lingering uncertainties about how fast the technology can be pushed.
The differences among participants in the process extend to how the technology nodes should be designated. The 1999 ITRS replaced the micron metric with the nanometer metric, partly because "0.07 micron," for example, does not roll off the tongue as easily as "70 nanometers." While that shift generated little controversy, some participants say the node now nominally known as 100 nm should correctly be called the 90-nm node.
The debate goes beyond semantics. The IRC members who support the status quo argue that the industry has become accustomed to the progression from 1 micron to a half-micron (the intermediate step was largely skipped) and then to 0.35 micron, 0.25 micron, 0.18 micron and so on. In that progression, the 50-nm (0.05-micron) node would be an order of magnitude better than the half-micron (0.5-micron) node.
But because the factor of 0.7 is used to determine technology scaling, some critics of the current nomenclature point out that the product of 0.13 micron and the 0.7 scaling factor is not 0.10 micron but 0.091 micron. That camp is therefore urging that the technology nodes be renamed accordingly.
The 2000 update further includes the addition of a post-etch "physical" MPU/ASIC gate length measured in nanometers. That marks a departure from the past practice of describing gate length solely in terms of the "printed in resist" gate length. The new metric is as significant to microprocessor vendors which perform a variety of resist reduction and etching steps to shrink the all-important gate length as the pitch of the first metal level is to ASIC vendors.
Wilson noted that the new category an adjunct to the printed-in-resist length, rather than a replacement for it applies not only to microprocessors but also to high-performance ASICs, which often include a microprocessor core.
If it seems as if the ITRS is getting more complicated, that reflects reality. For the 130-nm node, for example, foundries Taiwan Semiconductor Manufacturing, United Microelectronics, Chartered Semiconductor and others now offer their customers four different transistors: those optimized for speed, at a trade-off of leakage current; those that conserve standby current, for cell phones; those with low active power consumption, for PDAs; and those offering the highest density and lowest cost.
The semiconductor road map has accelerated in recent years partly because optical lithography has exceeded expectations: 248-nm steppers based on KrF lasers, combined with optical proximity correction, phase shift masks and improved resists, have adapted more easily than had been thought to the shifts in line widths.
But for the 100-nm node, the 248-nm scanners must be replaced with ArF-based lasers emitting 193-nm-wavelength light.
"Relative to a year ago, the big disappointment has been the 193-nm lithography tools," Doering said. The technology is maturing slowly, and there's an insufficient supply of the basic lens building block, calcium fluoride, for some of the lens elements. "There is just not enough of that material CaFl available at the required specifications and quality," Doering said.
Moreover, the 157-nm lithography generation, based on fluorine lasers, "is falling a year or even two behind schedule," he said.
Another thorny issue is the gate oxide material, which is moving from a pure silicon dioxide to an oxynitride: an SiO2 film doped with nitrogen.
"People are pretty comfortable with the nitrided oxides, even though it is a difficult process. Quite a few companies are in volume production with that," Doering said. "But what comes next is the issue: No one seems very sure whether it will be a hafnium oxide or a zirconium silicate. The good news is that the oxynitrides have taken a little bit of the heat off."
The next road map meeting will be held in Grenoble, France, to coincide with Semicon Europa this spring.
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