KANATA, Ontario--SiberCore Technologies here today announced an initiative to develop a new family of content addressable memory (CAM) networking ICs from alliances between other companies and its designers of packet management co-processors.
The new SiberLink Strategic Partnership Program aims to establish close cooperation with vendors of network processors, switch fabric ICs, traffic management chips and field-programmable gate arrays (FPGAs), said the Canadian company. The partnerships will focus on applying SiberCore's ternary content addressable memory (TCAM) technology, which the company says is used in network co-processors to significantly increase switch and router throughput. The SiberCAM co-processor offloads packet forwarding and classification functions from network processors, SiberCore said.
"Historically, the processor has handled all packet classification and packet forwarding functions, as well as header parsing, encryption, compression, traffic queuing, header modification, statistics gathering, and other functions," said Andrew Sorowka, vice president of marketing SiberCore. "Packet forwarding and classification are the most computationally intensive functions in any switch or router, typically requiring 60% to 70% of the network processor's cycle capacity. Thus, adding a co-processor for packet forwarding and classification offers the opportunity for substantial throughput improvement," he said.
SiberCore said the 3-port interface in the SiberCAM design allows equipment developers to perform route and policy table management without impacting the search process, providing for sustained performance at up to 100 million searches per second.
"Several industry factors make a transition to co-processing solutions mandatory," Sorowka said. "The growing popularity of Service Level Agreements (SLAs) requires that networking equipment implement Quality of Service (QoS) and Class of Service (CoS) provisions. This results in the need to provide for application-aware switching, policy based networking, and packet classification, thereby compounding the packet forwarding task," he said.
"To implement these functions, information from Layers 4 and above must be extracted from the packet header and must be processed by the equipment," Sorowka said. "This phenomenon has increased the computational burden on the network processor and created a bottleneck that prevents wire-speed packet throughput."
Sorowka said the SiberLink partner program is much more than a cooperative marketing agreement and includes engineering departments working closely together to develop "innovative, exceptionally high throughput networking solutions."