LSI Logic announced Monday new technology that the company promises will usher in a whole new class of system-on-chip designs for communications, computer, and consumer products.
In late morning trading, LSI LSI was up 1 to 23.
The 0.18-micron process technology, called G12, is LSI Logic's fourth-generation for system-on-a-chip ICs. It offers up to 26 million usable logic gates on a die measuring 20-by-20 millimeters, according to the Milpitas, Calif., company.
"The G12 technology sets completely new levels of integration and performance, empowering our customers to create system-on-a-chip products never before possible on one silicon chip," said Wilfred J. Corrigan, chairman and CEO of LSI Logic.
The company said prototype designs using the new G12 technology are expected to begin in the fourth quarter. The initial production of G12-based ICs is slated to start in the second quarter of 1999.
The G12 technology will produce drawn gate sizes of 0.18 micron, with 0.13-micron effective gate lengths (L-effective). The process will route gates with up to six levels of metal. It will support ICs with operating voltages of 1.8 to 1.0 volts.
Compared to LSI Logic's existing G11 technology -- which has quarter-micron drawn gate lengths (0.18-micron L-effective), the G12 more than triples the maximum usable gate count on a chip. The G11 supports up to 8.1 million usable gates vs. 26 million for the new technology. Typically, G12-based chip designs are expected to have 500,000 to 8 million used gates vs. 100,000 to 3.5 million used gates with the G11 process.
In addition to digital design cores, the G12 process supports a number of mixed-signal building blocks, including data conversion, data transport, and signal processing functions, according to LSI Logic.