SAN JOSE -- Advanced Micro Devices Inc. and IBM Corp. sailed into the Microprocessor Forum this week with CPU strategies that could put a competitive squeeze on Intel Corp.'s IA-64 Itanium (previously code-named Merced) processor in 2001 and beyond.
AMD disclosed it will extend the x86 architecture to the 64-bit realm in its eighth-generation Sledgehammer CPU, a strategy that could serve the low end of the PC server market as well as desktops.
For high-end servers, IBM brought an eight-way Power4-based processor module to the forum stage, a design that one analyst called "a technical tour de force." However, Power4 is likely to be used only in IBM systems, and will not directly compete on the commercial market with Intel or other silicon.
In a trend toward chip-level multiprocessing widely seen at this year's forum, both AMD and IBM said they will put two instantiations of their next-generation processor cores on a single die.
With the approaches taken by AMD and IBM, software investments remain relatively intact. The Power4 is binary-compatible with the PowerPC designs that came before it, and AMD is betting that the huge IA-32 base of code will make its Sledgehammer a slam-dunk product.
Fred Weber, AMD vice president of engineering, argued at the Microprocessor Forum here that Intel was trying to turn the x86 architecture into a "second-class citizen. With Itanium, is Intel trying to do something great, or just something that is hard?" he asked.
"With Sledgehammer and the x86-64 instruction set, AMD will show that x86 has viability well into the future. We will provide the best 32-bit computing platform, while providing a future path to 64 bits that solves the primary problem: access to larger memory. Beyond additional memory, the enterprise world has few needs for 64-bit architectures," Weber said in an interview.
By putting two processor cores on the same die, hiking the core frequency beyond a gigahertz and using deeper pipelining, Weber said Sledgehammer will offer performance equal to or better than Itanium's, and protect customers' existing applications by running x86-based code without alteration.
AMD said it will add technical floating-point capabilities to Sledgehammer and the x86-64 instruction set. Weber said dual 32-bit and 64-bit support will be possible by "defining a mode in which all instructions act on 64-bit data."
In addition, AMD and Alpha Processor Inc., of Concord, Mass., are jointly developing a system bus architecture, called Lightning Data Transport, that will provide bidirectional gigabit/second interconnects between the processor and the PCI channels, system I/O and peripheral ICs. Chip sets equipped with Lightning Data Transport will be used in Alpha-based servers well before AMD has finished Sledgehammer.
Weber said Sledgehammer development is "about an 18-month job" that will be finished "sometime in 2001." He declined to say which process generation -- the late stages of 0.18 micron or the early 0.13 micron -- will be used to fabricate it.
Michael Slater, founder of forum sponsor MicroDesign Resources, predicted the AMD processor will compete with Intel's IA-32 Willamette microarchitecture, which is expected to move to silicon a year ahead of Sledgehammer. Intel would not dare create an x86 64-bit architecture that would muddle the IA-64 family that starts with Itanium, Slater said. Nevertheless, Willamette will extend IA-32 to higher performance and to the 36-bit memory addressing used initially in the soon-to-market Coppermine. That's more than enough to satisfy all but the most memory-hungry users, he said. (A 32-bit architecture can address up to 4 gigabytes of memory.)
Slater predicted that Sledgehammer will be combined with the Linux operating system in computers that could either be high-end desktops or PC servers, perhaps with four-way capabilities.
"For the guys who build big servers, it is hard to pull them away from Intel," he said. "The perfect market is the people who want to buy a high-end desktop and turn it into a server costing maybe $3,000 or less. My guess is that a lot of those people will use Linux with Sledgehammer," appealing to both "the anti-Microsoft and anti-Intel sentiment."
Nathan Brookwood, principal analyst at Insight 64 in Saratoga, Calif., said AMD is betting that the x86 architecture can be extended at least for the next decade, "which is a lifetime in this industry.
"If Alpha, AMD and Itanium all come in at roughly equal performance, then AMD will have the advantage because it will be superior at 32-bit IA-32 processing," Brookwood said. "Then they can say, 'you get 64 bits for free.' Intel has defined a radical path, while AMD has taken an evolutionary approach, and many people prefer the evolutionary way because it is safer."
Brookwood added that in recent months, Intel has grown more confident in its predictions for Itanium's performance advantages over Sun's Sparc and the Alpha processors.
"Since late spring, Intel has gotten progressively more aggressive. At the fall Intel Developer Forum, Intel showed transaction processing benchmarks that claimed they would be well ahead of Alpha and Sparc," he noted.
For its part, IBM came to the Microprocessor Forum armed with what analyst Slater called a "technical tour de force," primed to reassert its historic place as the market's performance leader. After an Intel engineer took two time slots to give an extended presentation that opened this year's forum, Jim Kahle, chief architect of IBM's Power4 design team, strode to the stage and said he planned to describe "twice the processor in half the time."
The Power4 is more than a processor: The core itself is designed to run at gigahertz speeds when it debuts in the second half of 2001. It will get there by relying on the potent combination of copper and silicon-on-insulator technologies, initially at the 0.18-micron generation.
Two cores reside on each die, with more than 100 gigabytes per seconf of bandwidth between them and the on-die L2 cache. Also, IBM has developed a new I/O technology, called synchronous-wave interconnect, which links the four dice at better than 500-MHz bus speeds. It can be extended to other modules as well.
The four dice are flip-chip packaged in a module with more than 5,500 connections to the substrate. IBM also plans to offer the Power4 in a single-chip configuration, packaged in a pin-grid array.
"This is a server-oriented design, with scalability and reliability as important as performance," said Mark Papermaster, director of the Power4 design effort. "The customer can take a two-way chip and later drop in an eight-way with a single multichip module."
Keith Diefendorff, editor-in-chief of the Microprocessor Report, said the Power4's combination of process technology, core design, interconnect and packaging classified it as quite a feat. And where its predecessor, the Power3, was used largely in CAD-oriented workstations, that will change with the Power4. IBM will use the CPU across the span of its midrange and high-end servers, from 390 mainframes down to Infinity servers based on IA-32 and, next year, IA-64 processors from Intel.
"In the past, IBM got confused, with too many processors, and they ended up with a bunch of crap," Diefendorff said. "With the Power4, they have brought their architectural, process and packaging skills all to bear on one design. The packaging alone is way ahead of what Sun and others can offer."
Brookwood of Insight 64 noted that IBM's Power4, Intel's IA-64 products and other high-end CPUs are poised to play an increasingly important role.
"The high end is where it's at. The Internet provides connectivity to servers like we've never had before," he said. "Twenty years ago, we had dumb terminals connected to powerful mainframes. Ten years ago, that had changed, with a lot of computing power on the desktop and maybe a database on a central compute platform. Now, because it has become more cost effective to put your processing power in one central place, the pendulum is swinging back to servers with relatively thin clients on the desktop."
Brookwood said while Intel is working hard to make sure the software base for IA-64 will be ready, "doing a wide range of software with this new architecture is what is making people nervous. The concern I have is that nobody has built a VLIW machine before that has succeeded from a commercial standpoint."