MOUNTAIN VIEW, Calif.--MIPS Technologies Inc. here today said it has developed the first 64-bit synthesizable processor core, which is capable of executing up to 450 million instructions per second. As part of today's announcement, Texas Instruments Inc. is Dallas said it has licensed the MIPS64 5Kc core and will offer it for ASIC designs in the TImeBuilder design library.
The 64-bit core packs between 360 and 450 MIPs of performance in a die area of 2 millimeters squared, said the Mountain View company. The 64-bit RISC core is aimed at networking, digital consumer, and office automation applications, according to MIPS Technologies, which said the new processor has been specifically designed for system-on-chip ASICs.
"This is a first for our industry," declared John Bourgoin, chief executive officer at MIPS Technologies. "Now chip designers for set-top boxes, handheld computers, Internet appliances, network systems and mobile communication devices have access to a high-bandwidth, high-performance 64-bit drop-in core.
"This new MIPS processor core simplifies the integration of 64-bit performance into low cost SOC solutions," Bourgoin added. "Now IC developers can choose to use 64-bit technology without paying a penalty in die size or power consumption."
MIPS Technologies said its MIPS64 5Kc is a fully static design and includes several power saving modes that can bring power consumption down to 1 mW/MHz when using a 0.15-micron CMOS process technology. The new 64-bit RISC core supports 0.18-micron and below process technologies. The company said the core will execute a worse case clock frequency of 250 MHz in 0.18-micron technology and 300 MHz in 0.15-micron processes.