WASHINGTON -- The pace of new DRAM generations suddenly is expected to slow down in the next 15 years, according to new 1999 international technology roadmap, which was unveiled this week by the Semiconductor Industry Association.
The surprising forecast, contained in the tables of the new document, is a sharp reversal from the DRAM forecast in the 1998 update of the SIA roadmap. The 1999 revision pushes out each new DRAM generation by one-to-three years until 2014.
Thus, the 1-gigabit DRAM, which was slated in the previous roadmap to enter production in 2002, is now expected to ramp up in 2003. The 4-Gbit DRAM was supposed to go into production in 2005, but now the new roadmap calls for only a 2-Gbit memory to ramp up in wafer fabs that year.
Similarly, the 1998 updated roadmap predicted that the 16-Gbit generation would start up in 2008, but the new schedule now places initial production of that memory density in 2011. Moreover, production ramps of 64-Gbit, 256-Gigabit and 1-terabit DRAMs--which were spelled out in the 1998 update--are not included in the 1999 document.
During Monday's press briefing, SIA officials said international participation in the 1999 roadmap contributed greatly to better understanding about how DRAMs are expected to evolve in the next 14 years. In particular, contributions from Japanese and South Korean chip makers influenced the DRAM technology milestones contained in the 1999 roadmap.
The DRAM generation stretchout has almost no relation to any delays in technology nodes since the 1999 roadmap calls for DRAM design rules to continue on the same pace as the previous forecast. Both the 1998 update document and new international roadmap said the 180-nanometer (0.18-micron) feature size, set in 1999, will shrink to 130 nm (0.13 micron) in 2002. DRAM pitch is expected to go to 100 nm (0.l0 micron) in 2005 and then down to 70 nm (0.07 micron) in 2008. Both the 1998 update and 1999 roadmap predict that DRAM pitch will reach 50 nm (0.05 micron) in 2011.
By contrast microprocessors continue on an accelerated technology pace with transistor gate lengths shrinking at a faster rate than previously set (see Nov. 22 story from Monday's press briefing).
The 1999 International Technology Roadmap for Semiconductors (ITRS) confirmed earlier reports that device shrinks will result in chip sizes to remain the same at about 800 mm2 for both DRAMs and microprocessors categories over the next 14 years. Previous roadmaps had projected the ever increasing functions and transistor density on chips would require bigger die sizes, said Paolo Gargini, Intel Corp. fellow and technology strategist who was the chairman of the roadmap's coordinating committee.
"We have identified some practical die sizes," he said during Monday's press briefing. "In the past, the trend used to be 1.4 times increase in die size for a generation and that lead to projections of gigantic die sizes." He said these projections caused semiconductor equipment suppliers to build tools for larger chip sizes, hinting that this belief might have caused the 300-mm wafer movement to be prematurely launched.
Gargini said the new international roadmap identifies die sizes that the industry can live with, and "this will represent a cost reduction for suppliers of fab equipment."
The 1999 roadmap also estimated that the cost/performance ratio for memory and various logic chips would continue on nearly the same 25% annual curve as in the last two decades. Thus, the cost per bit of production DRAMs was set at 15 microcents per transistor in 1999, dropping to 7.8 microcents in 2001, to 3.8 microcents in 2003 and to 1.9 microcents in 2005.