SEOUL, South Korea -- Korean electronics giant Samsung Electronics Company Limited said Monday (September 29, 2003) that it has developed a 4-Gbit NAND-style flash memory and 512-Mbit DRAM in advanced manufacturing process technologies.
However, the company did not say what memory interface the memories comply with, or when they would be mass produced.
The NAND-flash was fabricated it in a 70-nanometer process technology and the DRAM was made using an 80-nm process, Samsung said. In addition Samsung announced something called Fusion memory, which includes the monolithic integration of memory with logic.
The 4-Gbit NAND flash memory has a memory cell size of 0.025 square microns and includes a 30-nm thick metal gate of tungsten, which reduces inter-cell resistance and noise level. The new tungsten gate to be adaptable to designs at 50-nm processing node, Samsung said.
Samsung said it expects the chip to help it maintain its 65 percent share of the NAND flash market. The company is targeting 70 percent annual growth in NAND flash sales from $1.1 billion in 2002.
Samsung's DRAM has adopted Recess Channel Array Transistor (RCAT) technology and a high-k oxide process for low voltage requirements that go below 1.5-V. Mass production would begin with 1-Gbit and 512-Mbit densities capable of moving data at 3-Gbit/s, Samsung said.
Fusion memory is an integrated, single-chip that combines high density memory and logic, together with software availability. The first Fusion memory device is a 512-Mbit NAND flash memory with a logic interface.. Samsung said it intends the Fusion memory to drive acceptance of NAND only systems as replacements for NOR flash plus other memory combinations.