Renesas Technology Corp. Thursday (Nov. 20) introduced a 256Mbit AND memory that includes on-chip management to eliminated the need for external circuits to perform these functions.
The on-chip management includes a bad-sector function that ensures 100% operation regardless of whether there is a defect in the unit. An error-correction function also was added to improve data reliability.
A wear-leveling function evens out the number of rewrites on the chip. Renesas said a chip can become susceptible to damage if write operations are concentrated locally on the chip. The wear-leveling feature automatically switches write functions to an area on the chip where few rewrites have been performed. A power-on auto-read boot function allows data to be read from an expanded 8Kbyte area of the chip without a command or address input.
The new flash has 4Mbyte.write speed, which Renesas said is three times faster than its current 128Mbit AND chips. The 3.3V chips have multicell technology that allows one cell to perform the work of two ordinary cells.
Mass production will begin in December. The new flash is available in either 16-bit bus width or 8-bit bus width configurations. Both are priced at $11 in quantities of 10,000.