SAN JOSE, Calif.--IMEC, a European research consortium, has announced a deal with Praesagus Inc., a developer of solutions to model interconnect manufacturing variation in semiconductor applications.
The term of the agreement is two years. IMEC Industrial Affiliation Partners will have early access to the technology and Praesagus expects to incorporate the results into their commercial product.
The partnership will build on Praesagus' physics-based interconnect thickness variation modeling technology and expand the scope to include copper/low-k and three-dimensional modeling. The partnership will leverage IMEC's copper damascene, ultra low-k dielectric and 65nm expertise and experience, said Karen Maex, IMEC Fellow in the Silicon Process Technology Division.
"The current design for manufacturing (DFM) communication paradigm of CMP design rules and worst-case thickness tech files is running out of steam and the recently proposed alternative of density-based models does not provide enough accuracy," said Hugo De Man, IMEC Senior Research Fellow, in a statement.
"In our System-Level Integration Program, IMEC is researching the impact of process variability in deep submicron technologies on circuit and system level. Variability in interconnect RC delays is a main concern as we are scaling down technology beyond the 90nm node. Praesagus' expertise in physics-based modeling of interconnect technology offers a promising alternative to accurately predict the interconnect performance, serving as a critical input to system designers," he said.