By Stephan Ohr
Texas Instruments Inc. has demonstrated a version of its C64xx DSP family that clocks at 1 GHz. TI believes that the world's fastest DSP will have immediate utility in such real-time signal-processing applications as cellular basestations and digital audio and video encoding.
The move comes on the heels of TI's winter introduction of a 720-MHz version of the C6416.
But the concentration on clock rate may be overblown, suggested Jeff Bier of consultancy Berkeley Design Technologies Inc. "It's not the be-all and end-all; we should not get carried away by that number," Bier said. "It is one measure of performance. The real issue is how much work you can do at each cycle."
TI, to be sure, has ready-made slots for the gigahertz version of its C64xx. Customers building cellular basestations will be able to implement more signal-processing channels, said TI technology fellow Ray Simar, inventor of the C6000 parallel architecture.
Nonetheless, TI's drafting of a white paper contrasting PC CPU tasks with DSP tasks hints of some internal concern about potential comparison with Intel Corp. processors. "Intel will push on clock speed, but customers don't necessarily see that in their application," Simar asserted. "When we push on clock rate, customers will see the translation to performance."
In its first iteration, the C64xx was demonstrated in the laboratory using 0.13-micron CMOS, and samples will be handed out in the first half of 2004. In production, the device will employ the 90-nanometer CMOS process under development. "We're pushing hard on performance," Simar said. In wireless-infrastructure applications, he said, "the trend is to push programmability out from the baseband processor toward the antenna."
"The real market is in the ability to do more channels per chip," said Will Strauss, principal analyst with Forward Concepts (Tempe, Ariz.). Basestation makers will want to get at least 64 channels per chip out of a processor. The 1-GHz DSP will allow more channels-though the actual number may not scale with frequency-and the cost per channel will go way down, Strauss said.
"The higher clock rate means more bandwidth," he said. "If you're doing radar or sonar, you have to love that stuff-but that's less than 5 percent of the total DSP market." Other applications that will benefit from a faster DSP include medical imagers like CT and MRI scanners, and luggage inspection systems-"fast bomb sniffers," said Strauss. "There's always a market for performance."
But Simar believes speed will open many doors. A higher clock rate means more multiply-accumulate operations, and those will serve data path applications. TI believes that perhaps by 2010, DSP could form the heart of "smart cars"-automobiles that can "see" and steer accordingly through traffic, slowing and stopping for pedestrians-and other high-density visual-pattern recognition systems.
Among them are iris and cochlea replacements, which supplement sight and hearing with semiconductor sensors and interpreters. Researchers working on artificial-vision systems, for example, plan to increase the resolution of their experimental systems from 16 to 1,000 pixels.
In the short run, customers implementing digital video transmission can use faster DSP to achieve the higher resolutions and frame rates that are important to high-definition TV broadcasting, Simar said.
Aware Inc. (Bedford, Mass.), for example, will use the 1-GHz C64xx to increase resolution and frame rate for video images compressed with JPEG2000, said James Janosky, the company's sales manager.
To be sure, TI has competition in its race to the ultimate DSP applications-and not just from other DSP makers.
On one side, Analog Devices Inc. is rolling out higher-performance DSPs. For compute-intensive applications, such as cellular basestations, Analog Devices touts its TigerSharc processor, a parallel machine that performs eight 16-bit multiply-accumulate operations in each clock cycle, said Gerry McGuire, ADI's product line manager for DSP. The machine includes "link ports" that allow it to be configured in a multiprocessor array.
By linking the TigerSharc in an arbitrary array, the DSP can increase the chip rate and the symbol rate associated with programmable radios and thus boost the channel density of cellular basestations. For 3G applications, ADI claims toeholds among the "who's who" of basestation manufacturers, McGuire said-as well as design wins among developers of industrial and artificial-vision systems. In fact, Defense Advanced Research Projects Agency funding encouraged the TigerSharc's use for radar and sonar processing.
ADI's highest-performing processors run at 600 MHz; beyond that, McGuire said, processing power is wasted without matching I/O and memory bandwidth: "Getting sustained Mips and sustained Mflops is very much of a balancing act."
But the real competition for TI may come from manufacturers pumping the reconfigurable-computing handle, particularly those using FPGAs. Reconfigurable computing is not an immediate threat to a DSP vendor like TI, said Bier, but "it is looming in the background."
In communications applications, hardwired FPGAs will allow faster processing and more channels per chip than a programmable DSP, Bier said, but the cost may not be competitive. "For an FPGA design, you have a five times longer design time, and that's the major obstacle.
"You need $10 million and many years of development work to solve that problem," Bier added, referring to the design tools for FPGAs and other reconfigurable architectures. "The current tools are less complete and less efficient than the development tools TI and others make available for their DSP processors. There are dozens of people who can extract full performance from FPGA architectures and tens of thousands experienced with DSP programming tools."
Developers turning the reconfigurable-computing crank include Quicksilver Technology (San Jose, Calif.) and picoChip Designs Ltd. (Bath, England).
Forward Concepts' Strauss said he believes Motorola Inc. is using a reconfigurable-computing fabric for high-speed DSP with a 16-processor array licensed from Morpho Tech. The architecture is dynamic and can be reconfigured at almost every clock tick.
Motorola will tailor the architecture to respond to its own instructions, Strauss said. That would be instrumental in building the true software-defined radio, he said.