By Chappell Brown, EET
The Defense Advanced Research Projects Agency is overseeing development of optical interconnects that will be able to achieve 1,000 times the speed per power and volume of electronic interconnects.
Due to Moore's Law, single-chip processors will eventually achieve speeds measured in tens of teraflops, but the throughput of electronic interconnect will remain in the 1- to 10-Gbit/second range. Ravindra A. Athale, Darpa's photonics program manager, aims to be ready with solutions.
High-end supercomputing clusters linked by high-speed networks are already in the 10-teraflops range and supercomputer makers have petaflops designs under development. But what Darpa needs is a teraflops computer in a small, rugged form factor that can be inserted into a variety of military equipment.
One example Athale presented recently at Stanford University was an adaptive signal-processing system called an air-moving target indicator. Current systems achieve 386 Gflops with 1.7-Gbyte/s I/O bandwidth, he said, adding that Darpa plans to bump those figures up to 12.5 Tflops and 34.9 Gbytes/s in a system that could be embedded in a variety of aircraft.
Athale also described the work of several university and company groups developing optical-interconnect solutions under Darpa's aegis. The basic technology strategy is to use vertical-cavity surface-emitting laser (VCSEL) diode arrays and photodetectors for optical I/O and free-space optics for interconnect paths.
Optics has a clear advantage when it comes to large numbers of direct interconnects between processors, since light beams can intersect without crosstalk. Also, optical interconnect can be scaled up with very little increase in power dissipation.
Sadik Esener, director of the Center for Chips with Heterogeneously Integrated Photonics at the University of California, San Diego, has built a prototype optical-interconnect module along those lines. The palm-size unit be can mounted on a printed-circuit board.
Multichip-module technology is used to assemble four VCSEL chips in a 1 x 12 configuration, lined up opposite a similarly configured array of metal-semiconductor-metal photodetectors. The system is able to implement 48 channels, each with a throughput of 840 Mbits/s.
Silicon-routing chips are used to interface with the electronic components on the pc board. Another project in Esener's department is building free-space optical interconnect for chip stacks consisting of memory and floating-point processor arrays, Athale said.
In this scheme, the chips within the stack are interconnected vertically. On top of each stack, arrays of optical emitters and detectors are flip-chip bonded along with microlens arrays. Optical-interconnect beams bounce off a mirror over the array of stacks to create point-to-point interconnects.
A project that uses existing technology and could therefore be implemented quickly uses Peregrine Semiconductor's Flipped Optoelectronic Chips on Ultrathin Silicon (Focuts) approach on ball grid array packages. This type of package was developed to create dense electronic I/O with minimum crosstalk, and BGAs have excess real estate around the edges.
Focuts uses Peregrine's CMOS-on-sapphire technology, in which the substrate is ground down to an ultrathin profile, making it transparent. Embedded VCSELs can transmit light through the ultrathin substrate to provide optical I/O anywhere on the chip. By simply placing Focuts circuits around the periphery of a BGA, high-bandwidth optical I/O can be implemented on packages carrying a large number of VLSI chips, said Athale.
Elsewhere, Michael Haney at the University of Delaware is developing a free-space optical-interconnect scheme for arrays of systems-on-chip. A multichip module carries the SoCs and each is equipped with a cluster of VCSELs.
Optical beams from the VCSELs pass through a microlens array and bounce off a mirror, where they are reflected back to other chips in the array. Called Fast Net, for Free-Space Accelerator for Switching Terabit Networks, the system is said to be capable of establishing a high-speed data pipe between each pair of chips.
Practical systems using these approaches are close to realization, Athale said, but Darpa would like to see a genuine VLSI photonics emerge eventually. Research is under way on methods that would make it possible to build photonic and electronic circuits on the same chip with the same process, but this is a tough problem to solve. Researchers have assembled all of the current projects from existing electronic and photonic devices and chips.