Filters have always presented some of the toughest challenges in analog design: the math is difficult, the circuit selection is based on a variety of subtle criteria, and the component tolerances are critical. Tradeoffs between the variables are time-consuming and not always well defined.
The effort often seems more like an adventure into an uncharted jungle than methodically solving an engineering problem. New traps and dangers seem to appear out of nowhere to surprise the unwary designer at every turn. Worse yet each design can be unique, with even minor changes requiring an entire new path to be hacked out of the "jungle" of potential designs.
Fortunately technology has advanced to the point where most of these problems are at least manageable if not completely conquered. To illustrate this, let us look at a typical filter design problem as an example and compare two different approaches to building the desired filter. Either approach will work well; the choice of which one to use is really one that depends on the requirements of the specific application.
Figure 1 shows the Bode plot (magnitude vs. frequency response) of a six-pole voice bandpass filter generated by filter design software. Such a filter might be useful in a communications system to reduce out of channel noise which would otherwise make the desired voice hard to hear.
Figure 1: A six-pole voice frequency bandpass filter
The filter used in this example has a -3dB passband from 500 Hz to 3 kHz, and a minimum attenuation of -20dB, 500 Hz outside the passband.
The filter design software takes advantage the processing power of modern computers to provide a "drag and drop" capability. This capability allows for instant feedback as you change parameters by dragging the appropriate line on the plot with your cursor. As the limiting line is moved the software re-computes the filter response curve and generates a new response plot.
This interactive capability was used to "tweak" the filter parameters until the notch which originally was located at 375 Hz was moved up to 400 Hz. For a filter which is to be used in an avionics system, this would now provide an extra 60dB of attenuation at the avionics AC power supply frequency as a free bonus, just as the result of a slight adjustment in filter parameters!
In this way the interactive capabilities of the filter design software allows the user to quickly evaluate many different filter approximations, combinations of parameters and even different numbers of poles in the filter so as to select the optimal design from the high level system viewpoint rather than having to be bogged down with circuit level and component level detail.
The traditional approach
Solving the filter design equations is only the first step; we don't yet have a working filter! We still have to reduce the design to hardware and there is a lot of decision making still to do concerning the realization and hardware tradeoffs. Computer tools can help with these decisions, by analyzing and presenting the designer with alternatives and an evaluation of the suitability of this application to this particular circuit, but the designer must ultimately still make the decisions.
For the traditional approach, the filter can be divided into a series of two pole Biquadratic stages and possibly a single pole Bilinear stage with which to build the filter. Each stage is then analyzed separately during the implementation and realization steps. All of the stages are then cascaded together to produce the final filter.
A specialized computer tool is used analyze the design. Each stage of the filter could have any of a dozen different circuit implementations, with each implementation suited to a different situation and stage of the filter. The software now presents the various potential circuit implementations together with an analysis of the particular circuit characteristics as they apply to the present situation.
Naturally the operational amplifiers must have sufficient gain-bandwidth for the desired signals, plus they must be capable of meeting any other requirements of the application such as noise. This too is dependent on the particular circuit chosen for the filter stage.
Once the basic circuit design is selected, then the resistor and capacitor tolerances and temperature requirements must be considered. Normally standard EIA 1% tolerance components are sufficient, but in some cases components trimmed to exact values must be used. The same computer tool which analyzes the circuit can usually evaluate the effect of component tolerances on the design.
The underlying filter response equations are sufficiently complex that no simple rule suffices for this determination, one simply has to examine each circuit individually for its sensitivity to the variation of this component value in this particular situation. Once again computer tools help greatly in the analysis, but the basic decision making is still essentially a manual process.
Finally we have the desired active filter shown in Figure 2 which uses off the shelf Op Amps and 1% standard EIA components for a total parts count of 40 parts, not including power supply decoupling. Some optimization of the parts count would be possible by combining parts such as single resistor values and Op Amps into a single package at the expense of using less widely available parts if that is desirable.
Figure 2: Traditional realization using op amps and 1% EIA standard components
The same computer analysis tools were used to generate the plot shown in Figure 3 which compares the desired response curve in black with the predicted response curve using 1% components in red. Worst case error is predicted to be approximately 2% of the signal magnitude at any frequency.
Figure 3: Calculated response of the traditional filter realization
Total design time from specification to prototype hardware is estimated to be 8 to 12 hours assuming that all of the parts are on hand.
The FPAA approach
Another approach is to take advantage of recent advances in programmable analog technology achieved by using Field Programmable Analog Arrays (FPAA). Until recently programmable analog really was just a novelty. The available technology just was not able to provide the performance which designers expect of modern analog devices. The FPAA has radically changed that situation. The FPAA uses switched capacitor techniques to provide programmable analog capabilities which are at least comparable in performance to older switched systems such as digital signal processing (DSP) technology, but without the amplitude range and quantization limitations which are inherent with DSP technology.
In some respects the resultant performance of the FPAA is far superior to older technologies, since switched capacitor techniques take advantage of structures which can be fabricated reliably and repeatably when using a modern CMOS chip fabrication processes.
A major advantage of switched capacitor technology is that the filter parameters depend almost entirely on clock frequency so the resulting filters are extremely stable and repeatable over a wide range of temperatures and variations in device fabrication. In addition this characteristic allows for easy tuning over a wide range by externally altering the clock frequency.
To use the FPAA approach we start out just as we did with the traditional approach, we enter the filter specifications into the filter design software, inspect the Bode plots, and make changes as required until an acceptable design is achieved.
Once again we see the same Bode plot as shown in Figure 1 of the six-pole bandpass filter generated by the AnadigmFilter filter design software. As before, the filter has a -3dB passband from 500 Hz to 3 kHz, and a minimum attenuation of -20dB 500 Hz outside the passband.
At this point, however, rather than dividing the filter into biquadratic and bilinear stages and then starting to analyze each stage individually, the user merely "clicks" on the "Send Data" button located in the lower right corner of the screen to transfer the design to the FPAA EDA tool.
In a few seconds the transfer and analysis process is completed so the EDA "pops" to the top of the users screen almost exactly as shown in Figure 4. If desired, the user could now run a detailed simulation, add more circuit components, or make other modifications to the design.
Figure 4: The voice frequency bandpass filter FPAA realization
In this example our test board uses a different output from the default board so we will modify the output connection pin, to show how easy this is to do. It is actually faster to change the FPAA circuit internally than to change the external jumper pin on the evaluation board.
To do this, you right click on the blue wire leading to the output pin at the upper right corner and select delete. Next you hold the cursor over the output pin of the filter; the cursor changes to a pen icon to indicate that the EDA tool is in wiring mode. Now click on the pin of the output cell at the lower left corner of the chip to route the wire. This completes the rewiring and we see the final filter design shown in Figure 4. It takes you longer to read this than it takes to do the wiring on the screen! Now you can download the design to the evaluation board by clicking on the blue down arrow icon on the toolbar of the EDA tool.
Figure 5: A typical FPAA system using an SPI EEPROM to boot a single FPAA chip
Figure 6: Agilent spectrum analyzer trace of the actual FPAA filter realization
The download from the Bode plot to operational silicon is completely automated, requiring only that the user initiate the transfer and make any changes that are desired along the way. At this point you have working hardware for testing. The advantage of this rapid design cycle is not merely in the saving of engineering time, although that is certainly significant, but reflects the fact that any truly innovative design work must out of necessity incorporate a certain amount of trial and error.
Experience in the digital design space using Field Programmable Gate Arrays (FPGAs) has shown that much of the benefit derived from rapid prototyping is derived from the ability to try out 20 or 30 designs rather than only two or three so as to select the optimal set of tradeoffs based on actual trials.
Once you are ready to build a production version of the filter, Figure 5 shows the schematic one configuration of the FPAA which uses an SPI EEPROM to boot a single FPAA chip.