SAN MATEO, Calif. The Network Processing Forum (NPF) this week will describe its formal goals, which include some aggressive deadlines for the completion of draft specifications for several key chip-to-chip interfaces. The NPF will also begin a benchmarking process for network processors.
The forum, which was created in December 2000, combines the former Common Programming Interface Forum (CPIX) and Common Switch Interface Consortium (CSIX) initiatives. But the organization also hopes to establish standards for benchmarking a thorny issue because it's difficult to pin down the definition of a network processor, let alone the kinds of tasks such a part should perform.
The NPF hopes to make substantial progress in all areas by the end of the year, including draft specifications for key CPIX and CSIX concerns, said Chuck Sannipoli, NPF chairman and IBM Microelectronics manager of networking business development. Those deadlines had initially been more relaxed, but NPF members began discussing a more aggressive schedule when they met in December.
The larger goal of the NPF is to accelerate the use of off-the-shelf components in place of ASICs for functions such as packet processing, classifying and switching, Sannipoli said.
On the hardware side, the NPF inherits the six-month-old CSIX Level 1 standards for the interface between network processors and switch fabrics. Two other links are being defined: a "lookaside" interface connecting the network processor to coprocessors, and a "streaming" interface between the coprocessor and a framer.
"It would be wonderful if all these things could use the same kind of interface, but nobody expects that to happen," Sannipoli said.
Drafts of the lookaside interface and the Layer 2 CSIX interface are expected by the end of the year. The streaming interface draft, being defined for 10-Gbit/second speeds, is due early in 2002. In developing that interface, the NPF is hoping to draw from the SPI-4 and SPI-5 interfaces from the Optical Internetworking Forum.
On the software side the purview of CPIX the NPF is developing two application programming interfaces (APIs). A high-level API will sit inside standard software stacks and allow the construction of specific components such as Internet Protocol version 4 stacks. A lower-level, protocol-independent API will be developed for table management.
Also on the software side, the NPF is defining a message layer for communications between a network processor and the control-plane processor. The latter is usually a general-purpose microprocessor that handles slower tasks and exception cases as requested by the network processor. The message layer will allow the two processors to be separate, which is important, since the control-plane processors will probably continue to scale more quickly than the network processors, Sannipoli said.
Frameworks for the APIs and message layer are scheduled to be completed by the third quarter of this year, with draft specs ready in the fourth quarter.
Perhaps the most complex of the NPF's tasks is benchmarking, because network processors tackle different problems in such different ways. "This is a thing that we've had a hard time getting our hands around," Sannipoli said.
The key is to keep in mind the NPF's goal of spreading network-processor use, he said. To that end, the NPF has crafted a survey for OEMs, sketching the forum's own suggestions for benchmarking and asking respondents to critique the ideas and come up with their own.
Benchmarking is on a particularly aggressive schedule: NPF members want to see a benchmarking framework draft produced by the end of the second quarter of this year, with draft specs ready at the end of the third quarter.
"That's the one that's probably the most aggressive," Sannipoli said of the benchmarking plan.
The benchmarking committee initially has been chaired by XStream Logic Inc. (Los Gatos, Calif.), which took interest in the topic because of its processor's unusual architecture. "What we do isn't easily measured by benchmarks," said Ron Barr, director of corporate development for XStream.
At last week's Gigabit Ethernet Conference, XStream officials explained their proposal, submitted to the NPF, for benchmarking based on specific pairs of applications. For example, XStream's benchmark would measure how much bandwidth is left over for load processing while the device is handling packet processing.
XStream's proposal would not be a matrix of all possible application pairs, but a sampling of tasks most frequently required by OEMs. "We'll end up with sets of commonly used applications," Barr said. "Customers have a decent idea of what they're going to be running, so we'll limit it down to that."
In June, XStream is likely to step down from chairing the benchmarking committee, Barr said.
Although some systems vendors are members of the NPF, the organization is still dominated by semiconductor companies. While OEM input is important to the NPF's success, many don't feel they need to be involved in the nuts-and-bolts development of new interfaces and APIs. Others aren't interested in letting their design requirements be known.
"They don't want to get in there and show their hand by asking certain pointed questions with their competitors sitting right there," Sannipoli said.
Yet other OEMs are still using ASICs for packet processing and aren't necessarily interested in off-the-shelf components. But the increasing availability of merchant silicon is beginning to sway even those companies, he said.