The Integrity RTOS supports the MIPS32 architecture and compatible processor cores, such as 4Kc, 4Km, and 4Kp. These cores are synthesizeable, 32-bit RISC cores for system-on-a-chip (SoC) applications such as battery-operated handheld devices, cable modems, line cards, and set-top boxes. Compatible with the MIPS32 architecture, the 4K family of cores run existing R3000 and R4000 user-level code. Integrity is a scalable, ROMable, memory-protected, royalty-free RTOS. It enforces security and reliability by separating the kernel from user tasks. In addition, it employs a preemptive priority-based multitasking scheduler that enables programmers to guarantee resource availability for critical tasks. It uses kernel sources with short, bounded computation times, and avoids instructions for long-latency operations, such as division and string manipulation, which can block interrupts in some systems. Integrity features networking and embedded Internet support. It supports a TCP/IP stack, web server, web browser, networking protocols (UDP, DHCP, FTP, and Telnet), routing protocols (NATrouter and RIP) and SNMP management software. The Integrity RTOS is available now for $15,000.
Green Hills Software
Santa Barbara, CA
(805) 965-6044 www.ghs.com
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.