The MAP-BSP family consists of several software programmable DSPs that target video-centric consumer broadband applications. The latest editions to the family are the MAP-BSP-15-350 and the MAP-BSP-15-400. These chips were designed to support more complex video processing for servers, professional video conferencing equipment, media gateway servers, and broadband head-end equipment. They are pin-compatible with all other chips in the MAP-BSP family. The family is based on a proprietary VLIW-SLMD architecture designed to unify the host processor with the video image processing capabilities, SDRAM and PCI interfaces, and a multimedia I/O system. Features include digital RAGB, which enables use of drives and digital display panels; PCI-compliant data port; partitioned, compiler-managed register sets; and task-optimized functional units. The 350 and 400 are sampling now.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.