Boston, Ma. - At the Embedded Systems Conference in Boston Atmel Corp. took the wraps off its AT91CAP9A-DK development kit for the design and implementation of DSP algorithms, custom peripherals, and additional processor cores on its ARM9-based mask-customizable microcontrollers.
The AT91CAP9 customizable microcontroller has a metal programmable (MP) block with the equivalent of 28K or 56K FPGA LUTs, which can be used to implement any IP developed on an FPGA, including complex DSP algorithms, such as OFDM, GPS correlators, FFTs, FIR filters, or H.264.
Atmel customizes the MCUs directly from an FPGA netlist created on the development board, using conventional FPGA design tools. The company claims the resulting customized MCUs deliver as much as 8X the performance, consume 99% less static power, and cost about 30% less than the FPGA-plus-MCU implementation.
The AT91CAP9A-DK is comparable to conventional FPGA development kits with on-board MCUs. The key components of the kit are the AT91CAP9 customizable microcontroller with extensive peripherals for networked embedded applications with man-machine interfaces, and an FPGA with 90 logic elements and a seamless interface to the AT91CAP MCU.
The kit allows the simultaneous development and emulation of both the ARM9 software and FPGA Verilog/VHDL designs. Existing FPGA designs can be ported directly to the development board and new designs can be done using it.
Atmel uses the customer's RTL to synthesize the gate-level netlist for the MP block on the customizable MCU and verifies timing. The customer only needs to simulate their own IP in the CAP netlist, to verify functionality.
Prototypes are available in less than twelve weeks after the final CAP gate-level netlist is completed. AT91CAP9 designs also may be implemented as a two-chip AT91CAP9-plus-FPGA solution for market testing.
Atmel has an extensive IP library of royalty-free peripherals, and 8- and 32-bit MCUs that can be implemented in the MP Block, as well as royalty-based licensed IP from 3rd parties, including a second ARM9 core.
The kit has a mother board with ATX power supply connector, TFT LCD display and interfaces to the extensive peripheral set on the AT91CAP9 customizable MCU, which include both a USB full-speed host and USB 2.0 high-speed device, 10/100 Ethernet MAC, image sensor interface, I2S audio codec, 2.0A and 2.0B CAN controller, TFT LCD controller, MCI, SSC, PWM, LCD and AC97 controllers, SPI master and slave, two USARTs, three 16-bit timer counters, and an 8-channel, 10-bit analog to digital converter.
An SD/MMC memory card interface (MCI) and external bus interface (EBI) support SDRAM, NAND Flash with error code correction (ECC) and CompactFlash with True IDE mode interface to GByte-plus on-board or removable memory including USB sticks.
The motherboard also has a DBGU serial communication port, four analog inputs, a second full-speed Host USB interface, two additional USB device PHY interfaces with USB B connectors, two 3.5 mm audio jack connectors, three 3.5 mm audio jack connectors with three status LEDs, two SD/MMC card slots, TWI serial EEPROM, image sensor expansion connector, 16 button keypad, software controlled Power LED, two general-purpose LEDs, four PIO expansion connectors, and extension connectors for PCI64 FPGA I/O and mezzanine boards.
The CAP specific mezzanine board includes the AT91CAP9E MCU and FPGA with 90K logic elements. This plugs directly onto the motherboard for not only software and hardware development, but also connection to real world applications for prototyping and end product evaluation.
The AT91CAP9 MCU has 16 KBytes each of program and data cache, 32 KBytes of additional SRAM, 32 KBytes of ROM. The twelve layer bus includes two busses dedicated to data- and instruction-memories (Tightly Coupled Memories or TCM) that bypass the cache to accommodate deterministic operation.
The AT91CAP9 MCU on the mezzanine board has a seamless, built-in FPGA interface that makes the FPGA logic behave functionally the same way as the MP Block on the target AT91CAP9 MCU. A memory expansion board includes 32 MB of Mobile DDR SDRAM, 16 MB Burst cellular RAM, and 128 Mbytes of NAND flash.
The AT91CAP9A-DK mezzanine board also includes an EBI memory extension port, SODIMM-144, ICE interface, reset push-button, wake-up push buttons, backup lithium battery, 12 MHz crystal, 32.768 kHz crystal, 64KB configuration memory, ByteBlaster configuration header, JTAG header, reconfiguration push button, 80-pad, 1.27 mm-spaced user IO grid, four user LEDs, and a PISMO-II standard extension connector.
The same C-compilers, RTOS, OSs, ICEs and IDEs used with Atmel's ARM-based MCUs can be used with the CAP versions of the devices. These include Atmel's free GNU gcc C compiler, GNU gdb debugger, FreeRTOS.org real-time kernel. DSP algorithms may be developed using MatLab, Impulse, Poseidon or other DSP tools.
The AT91CAP9A-DK development kit is available now and priced at $3,500. Atmel charges a one-time fee of $150,000 for design, mask fees, and prototypes of the customized ARM9-based MCUs. Production unit prices are $13 in quantities of 100,000 for the AT91CAP9S250 device.