SAN MATEO, Calif. NEC Electronics America and Texas Instruments Inc. will be among the chip makers announcing silicon for PCI Express at the Intel Developer Forum this week (Sept. 16-18). The new chips come as developers say a 1.0a spec is relatively stable, but systems-level design issues are emerging for the 2.5 Gbit/second serial interconnect expected to first appear in next year's PCs.
NEC is announcing Monday (Sept 15) a PCI Express switch, an Express-to-PCI-X bridge and a family of Express cores. TI is tipping plans for a low-end Express switch and an Express-to-PCI bridge. Agilent Technologies is announcing new test products and a development agreement with Denali Software Inc. to help speed Express to market.
The PCI Special Interest Group will hold its first Express compatibility workshop Dec. 15, aiming at the 1.0a spec finalized in April. "We plan additional compliance workshops in other geographical locations to serve our member needs," said Tony Pierce, chairman of the PCI-SIG.
"There are still errata and engineering change requests coming in for 1.0a, but it's relatively stable," said Michael Krause, an I/O specialist at Hewlett-Packard Co. "Some errata now are nits and some have minor implications for designs. I think all the major issues have been addressed by 1.0a which is what we are recommending vendors implement," Krause added.
Engineers are now starting to wrestle with problems finding reliable reference clocks for Express-based systems. Many available reference clocks do not meet distance propagation requirements, have return loss issues and exhibit variations that could impede system interoperability.
Makers of Express-based notebooks and micro-ATX-sized motherboards may be able to use existing reference clocks, but makers of full-sized ATX motherboards and servers are less sure how to handle the problem.
"The current clocks are poor in quality, and that's creating a lot of problems," said Krause. "I don't know how we solve this in the next few months. We are trying to find ways to educate clock makers on next generation designs," he added.
The clock issues are not expected to be a showstopper for the Express initiative, led by Intel Corp. But they do represent the next level of technical hurdles for rolling out the fast, serial interconnect to mainstream systems.
"I don't want to throw any water on the campfire. We've got reasonable stability in the spec and components are coming out, so now we have to kick the work up to systems-level issues," said Krause.
The HP senior engineer said he expects some top server vendors will not move to Express until 2006 for a variety of reasons. However, notebook and desktop makers will start migrating to the link next year. "I don't think it will be a barn burner in 2004," he said.
Graphics are expected to support both today's AGP interconnect and Express, perhaps through 2005. Ethernet chips riding the Express interconnect are expected to start shipping next year. Intel will provide a full set of desktop, notebook and server chip sets using Express, kick starting the market.
For its part, NEC Electronics America is rolling out a family of 150-nm Express cores for ASICs and has 130 and 90-nm designs in the works. The cores range from a basic transceiver with serdes to a full-blown Express endpoint controller.
NEC's Express-to-PCI-X bridge supports one 8x (eight lane) wide Express link and two 133 MHz PCI-X ports. It comes in a 500-contact TGBA and sells for $38 in high volumes.
The company's Express switch provides two 8x links and four 4x wide links for a total of 64 Gbits/second non-blocking aggregate throughput. It comes in a similar package and sells for $90. Both products, aimed mainly at PC servers, will sample in October and be in production by June 2004.
NEC is also considering an Express-to-PCI-X 2.0 bridge chip.
TI plans three 1x-class Express chips, a physical layer core, a bridge supporting up to six 33-MHz PCI links and a fan-out switch with one upstream and four downstream 1x ports. The components will be in production in early 2004.
Also on TI's road map are other chip-to-chip and card-level Express chips including devices for 1394, USB and the ExpressCard update of the PC Card standard. At IDF, TI will demonstrate an FPGA-based Express-to-PCI bridge streaming video from a PCI 1394 link to Express.
"We will be developing PCI Express-based products to enable the market to quickly adopt the technology in desktop and notebook PCI Express cards," said C.S. Lee, a senior vice president at TI. The company expects Express chip sets to be shipped in the majority of PCs by 2006.
Meanwhile Agilent will roll out at IDF its E2941A mid-bus probe for the E2960A protocol analyzer. The probe enables a direct connection to pc-board targets. The probe ships in January and costs $19,000.
Separately, Agilent and Denali will announce a collaboration to develop a design validation process for Express. Their work aims to help designers coordinate pre-silicon verification tests with post-silicon test and analysis efforts.
The first milestone in the effort, to be demonstrated at IDF, provides a common Express packet viewing capability for the pre-silicon simulation and post-silicon hardware debug. The offering lets designers view simulated Express traffic from Denali's PureSpec verification tool on an Agilent E2960A protocol analyzer.
Finally, Intel is expected to demo at IDF the first x16 wide Express interconnect running on a test platform. The 16x link is expected to be used for PC graphics chips, among the first components to make the transition to Express.