San Jose, Calif. A Fast Fourier transform (FFT) intellectual property (IP) core has been added to the MegaCore family. The FFT function is a parameterizeable IP core that can implement a block floating point system. The core employs an in-plane mixed radix four and two decimation in-frequency architecture, and implements any transform length that is a factor power of two. The core's control unit automatically implements partitioning between radix four and radix two passes. the core comes with the MegaWizard Plug-In Manager tool and is targeted at the Stratix family of PLDs.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.