NEW YORK Agere Systems Inc. is leveraging its extensive collection of communications intellectual property for a 90-nanometer ASIC design platform targeted at communications applications.
The AGR90 ASIC Platform, announced Wednesday (June 26), can be used to create predesigned, semicustom or fully custom solutions that may include such preexisting functions as standard protocols, serial/deserializer (Serdes) circuits, encoding schemes, digital signal processors, I/O cells, microprocessors, memory and more. By combining these functions with millions of logic gates and memory bits in an area array flip-chip package, design time can be reduced by approximately six months, Agere said.
"Our customers want to go from the start of an ASIC design to sampling in 9 to 12 months," said Cindy Genther, marketing director in Agere's ASIC business unit. Despite the industry downturn, communications companies are still developing ASIC solutions for their equipment designs, Genther said.
The ASIC platform will also yield positive effects on chip performance and power consumption, the company said.
For example, the company's fourth-generation Serdes subcircuit technology supports 2.5-Gbits/second transmissions. Designed to support speeds from 1 Gbit/s to 3.3 Gbits/s, Agere's 90-nanometer Serdes is expected to consume less than 80 milliwatts per channel at 2.5 Gbits/s. Multiple macrocells can be integrated into an ASIC, allowing total channel counts to exceed 100.
Agere expects developers of high-speed networking equipment to be early adopters of the technology, Genther said. "We believe 90 nanometers will be a critical technology for the 10-Gbit per second market," she said.
I/O performance is a key factor in those expectations. While a host of 180-nm (0.18-micron) and 130-nm (0.13-micron) processes have been developed to handle 10-Gbit/s operation, they are I/O limited, said Beth Logan, marketing manager at Agere. The higher-performance Serdes available with the 90-nm process will speed overall chip performance, she said.
Agere also sees the 90-nm process as a "very viable technology" for silicon solutions in wireless basestation equipment, Genther said and the company expects to see devices for this sector hitting the market in the second-half of 2004, she said.
The AGR90 ASIC platform is based on Taiwan Semiconductor Manufacturing Co. Ltd.'s Nexsys 90-nm fabrication process.
Agere has begun quoting prices to customers for the 90-nm technology and plans to start designs in the technology in the third quarter, with volume production starting next year.
With additional reporting by Robert Keenan, editor--in-chief of CommsDesign.com.