Burnaby, B.C. The CHESS-III chipset has been released for aggregating, growing, and transporting 2.5- and 10-Gbps metro services. The chipset includes the PM5376 TSE-Nx160 STS-1/AU-3 cross-connect device, the PM5326 ARROW-2x192 Sonet/SDH framer, and the PM5324 ARROW-1x192 Sonet/SDH framer. The cross-connect device grooms sub-wavelength traffic and features a non-blocking architecture that can scale from 150 to 640 Gb. The cross-connect delivers 2.5-Gbps and 622-Mbps I/Os to support new and legacy line cards. It also houses on-chip serializer/deserializer (serdes) components.
The ARROW-2x-192 is a 20-Gb framer while the ARROW-1x192 is a 10-Gb framer. Both framers implement section, line, and path performance monitoring; transparency of transport overhead; and control plane messaging. The also support channelized, concatenated, or arbitrary concatenated traffic, with automatic detection of any changes in traffic configurations.
All three parts in the chipset are developed in a 0.13-micron process. They are also all housed in an FCBGA package.
Pricing: In 1000-unit quantities, the PM5376 cross-connect is priced at $1725, the PM5326 20-Gb framer at $1295, and the PM5324 10-Gb framer at $840.
Availability: Prototypes of the frames will be available in Q3. Prototypes of the cross-connect will be available in Q4.