The CW4011 is a scalable, embedded processor for mobile video/imaging applications. Fully C-programmable, the device performs real-time video and main-level, main-profile (MP@ML) MPEG-2 encoding. The CW4011's CWv8 32-bit fixed-point core includes a vector array of fully pipelined SIMD/vector DSP units. It supports a 16-/32-bit SDRAM interface and a 16-bit host/ peripheral interface, and includes separate 16-bit video-in and video-out ports that support simultaneous data transfers at 100 Mbytes/second. Also included are a three-channel direct memory access controller, three-wire SPI serial interface, UART, JTAG/scan unit, 16 GPIOs and three timers. Capable of over 4,000 Mips, it consumes 0.1 mW/Mips and is available with a full software development kit that is Metrowerks CodeWarrior compatible. Available at 200, 233 or 266 MHz, the processor is sampling now and will be available in volume by the third quarter. Pricing at 200 MHz is under $20.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.