TAIPEI, Taiwan Toshiba Corp. is planning to move its 1-Gbit single-level-cell NAND flash chip into volume production later this year, with an eye toward using a foursome of two-die stacked devices to fashion a gigabyte CompactFlash card that will also find its way into the market during the holiday season.
The gigabit chip will be the company's first NAND flash chip made on a 0.13-micron process, which will eventually bring the power supply level down to 1.8 volts and make it more attractive for data storage in next-generation cell phones, the company believes. In the near term, however, Toshiba's early 3.3-V version will likely go into high-density flash cards for consumer digital video recorders.
Toshiba already has a gigabit chip based on multilevel-cell technology, which stores 2 bits per cell and runs on a 0.16-micron process. But the read and write times of the MLC chips are not as fast as those using single-level-cell technology, in part because of the additional circuitry needed to sense four voltage levels per cell. So in order to target multimedia applications that need quick, smooth recording of digital picture and video files, Toshiba is preparing this faster single-level-cell alternative, which was jointly developed with SanDisk Corp.
Bigger pages, blocks
Unlike earlier 512-Mbit versions of Toshiba's SLC flash chips, with 1-kbyte page sizes, this gigabit-class device will use larger page and block sizes to attain the quicker write and erase speeds needed for many real-time, high-density data storage applications, such as MPEG video.
With a 2-kbyte page size and a write/read cache architecture, the theoretical programming time is 10.6 Mbytes/second and the read time is 20 Mbytes/s on the 0.13-micron process. In the past, Toshiba has also said the area efficiency of its 1-Gbit design will be double that of its 512-Mbit NAND flash, with a cell size of 0.077 micron2 and a die size of 125 mm2 at 0.13 micron.
Veering toward pipelined
The TC58NVG0S3AFT is a 3.3-V NAND E2PROM organized as 128-M x 8 bits. It has two 2-kbyte static registers, one of which acts like a cache that allows the next page of data to load while the current page mode is transferring data between the register and memory cell array in 2-kbyte increments. "It runs sort of like a pipelined architecture," said Doug Wong, a member of the technical staff for Toshiba's NAND flash components.
The chip uses the I/O pins for address and data input and output, as well as for command inputs. Its erase and program operations are automatically executed, the company said. Its initial access time is 25 microseconds, with serial access at 50 nanoseconds. The chip will be manufactured at Toshiba's Yokkaichi, Japan, fab and come in a 48-pin TSOP that measures 12 x 20 x 1.2 mm. Samples are available now for $60 each.
The gigabyte CompactFlash card will use four 2-Gbit stacked devices and a controller and will come in a 3.3-mm Type-1 card. Operating voltage ranges from 3.3 V to 5 V. Samples are available now for $700 each.