Editor's Note: ASICS.ws is an ASIC design house based in Thailand that develops silicon intellectual property (IP) cores on an open-source basis. The two chief members of the company, Rudolf Usselmann and Richard Herveille, have
become two of the most active contributors to the
OpenCores web site. The following article contains excerpts from an interview in which Graham Seaman, founder of the open-source Open Collector web site, talked with Usselmann about his company's work and the future of open-source IP cores in system-on-chip (SoC) design. The full interview is available at the Open Collector site.
Seaman: What does your company do, and what kind of clients do you have?
Usselmann: We provide technical consulting services. These services mainly focus on IC design. We will assist at all phases in a design, from architectural definitions through RTL coding and synthesis to final
Seaman: A few years ago IP design houses with no fabrication capabilities seemed to be the in thing. Now there's much less talk about them. Have most gone the way of the dot-coms, and is it a declining market?
Usselmann: The IP business is a very tough business to be in. It's not enough to just produce IP cores, or hire some guys on the other side of the globe to write them for you. You must be able to produce high quality IPs and be able to support them. If you can not support your IPs, you are out of business -- no matter how cheap your cores might be.
Seaman: With the decrease of in-house production and growth of independent fabrication facilities, are we likely to see standardized or even free cell libraries as a way of attracting customers?
Usselmann: Yes, I think so. Design reuse has been a big marketing term for a long time. Almost every company that is in the ASIC business has its own internal libraries. These libraries include everything from small cells to large IPs. The next natural step would be to open up these libraries. Especially with organizations like OpenCores providing free and open IPs,
companies will be forced to open their libraries or adopt existing open
Seaman: That brings us on to your free core designs. How does producing the free cores fit in with your paying work?
Usselmann: It was an experiment. I like the idea of open and free software. I was wondering how people would react to open and free hardware.
We tried to produce several high quality cores that could immediately
be implemented in an ASIC. So far we have ended up providing many,
many hours of free tech support which almost crippled our company.
Now we've started sending out friendly replies asking people to pay
us for any support they might require.
Seaman: That sounds like the model used by some software houses working with free software -- the software itself is free of charge, but the
software house makes its income by charging for support, integration,
one-off enhancements, and so forth. Could that also become a workable model for hardware designs?
Usselmann: Exactly! We have obviously watched other companies in the software industry and we wanted to see if we could apply the same principles to Chip Design. It's hard to say if it will work for hardware or not. I have the feeling this will take off in Asia, but the U.S. and Europe will be more
cautious. It's all about trust. As you get more popular people
will start to take you more seriously and will realize that your free
cores are not the works of an amateur but are real products.
Seaman: Your company is called ASICS, but I would guess that many people using your cores are using them in FPGAs. How does that work out in practice? Can you synthesize them for FPGA or ASIC without any tweaking?
Usselmann: All cores are provided in source form. The end user can chose the final technology the core will be implemented in. From the design perspective, it is irrelevant what technology will be finally used to implement the core, as long as the technology meets some basic performance requirements.
Seaman: I see your cores have mostly been synthesized for UMC's ASIC process. Do you have any deal with UMC to get them manufactured in low volume? If so, is there any way this could be used by others?
Usselmann: Unfortunately, we don't have any deals with any of the foundries yet. You see several UMC implementations because a commercial
user implemented the cores in an ASIC. We helped synthesize the cores
and had access to the UMC libraries.
Seaman: Now I'd like to ask some questions about OpenCores itself.
How do you think OpenCores will evolve? Will it always be a collection
of assorted parts, or will the parts one day make up some kind of whole?
Usselmann: OpenCores is a free IP depository. As such, I believe IP cores will remain focus point at OpenCores. However, there is nothing to stop the appearance of entire systems, specially if they are made up of cores
available at OpenCores. Check out the documentation of the CONMAX IP core. It
demonstrates how an entire SoC can be built by just downloading IPs from
Seaman: What about the quality? Will that become good enough to compete with commercial offerings?
Usselmann: Eventually yes. Today, I think there is a serious shortcoming of high-quality cores that can be downloaded, synthesized and manufactured. OpenCores needs to get more serious about its direction as an organization, and promote itself and stay truly open. OpenCores must attract more senior guys who will commit to complete a project. Of the 145 projects there, only 53 are actually completed! This is only 36 percent. Out of the completed 53 projects, 20 have been completed by ASICS.ws.
The really bad news is that most of the projects that were not completed are
abandoned or have never been started. It is too easy to get an account
and type in some stuff and never follow up. Other things that are missing
is the support of contributors. This should include collections of donations
and hiring some powerful attorneys to protect projects.
Seaman: Well, I guess that's pretty typical of public repositories in general. The problem is that new people look
at one or two unfinished designs and generalize from that to the quality of
the collection as a whole. The new organization of projects into categories
of completeness looks good to me. So are the problems you're talking about just teething problems?
Usselmann: Right now we are still in a start-up phase where we lack direction and goals. Most people just write cores that are very simple or intriguing. There hasn't been a disciplined development process in the OpenCores community.
What I mean by disciplined development is that people analyze what cores are
essential for the community and commit to write them. And I'm certain we will see a lot of innovation. The Xiph.Org group, for example, has come up with an alternative to audio compression. This new compression algorithm (Ogg Vorbis) is a royalty free alternative to MP3.
Seaman: Does the GPL [GNU Public License] have any meaning in the context of hardware design?
Usselmann: I'm not very familiar with the licenses. Just one comment here: Restricting open/free IPs so that users must feed
improvements back to the open/free community will scare off any commercial
customer we might attract. Let me repeat: Nobody will touch a core if they
must return improvements back.
We need commercial customers to come and use our cores and manufacture
devices that are cheaper than what they could produce otherwise.
Because the designs are free and open, there will be competition that will drive the price down. However, commercial customers need to be profitable and sell improvements that they make. They can't do that by opening everything up. We need to create a win-win situation, otherwise we will lose.
Seaman: How about testing the designs? Most ordinary users/designers can at best get hold of FPGAs. Given the speed limitations of FPGAs relative to custom designs, does this restrict what free hardware designers can do?
Usselmann: I think we need to be very clear as to what we are trying to do. I believe our first goal should be to provide free IP. This is where our strength as an open community lies and where we can do the most.
Manufacturing, be it FPGAs or full custom, is a very expensive proposition
and will remain out of our reach for quite some time.
I do not believe that we would gain anything by doing our own manufacturing.
Seaman: One of the most important things to happen to OpenCores seems to me to be the donation of the Wishbone bus standard. Am I right? Is there any take-up of Wishbone outside OpenCores itself?
Usselmann: Yes, the donation of the Wishbone bus was a major stepping-stone for OpenCores. It will take a while before Wishbone bus will be as widely accepted as AMBA (ARM) and CoreConnect (IBM). However, the company that donated Wishbone, Silicore Corporation, has been promoting the bus with
its clients for a while. I believe bridges between Wishbone bus and AMBA
and CoreConnect will open up the usage of OpenCores IP even further.
Seaman: Commercial IP owners seem to have been fairly restrained regarding the free
cores so far, threatening legal action over trademark rather than patent
issues. Do you think this will continue, or are they likely to become more
Usselmann: I think we will see more aggression before it will calm down. They can't
go after patent violations as long as we don't manufacture and sell
chips based on IP that might violate patents. However, trademarks can
be enforced in publicly written materials.
Over the long term we hope the movement will be to invent and design
new technologies and architectures, rather than reverse engineering
and improving on old once. One such example is the OpenRISC CPU. It
is not a clone but a "newly invented" CPU, with it's own Instruction
Set Architecture (ISA) and development tools.
On the other hand there are also numerous clones of industry standard CPUs, such as MIPS, 8051, and Microchips PICs. We also had an ARM clone, which was forcefully removed by ARM Corporation. On one side this is actually good news -- corporations
are starting to recognize OpenCores as a threat because we are actually
generating superior quality IP cores and clones! It will not be long
before OpenCores will dominate the markets and ARM will have to fight
really hard to keep their last customers.
Seaman: Finally, many people designing free cores seem happy to use proprietary
One result is that there seems to be little feedback between people trying
to write free EDA software and creators of free designs. Is there any way
this situation could be changed? Does it need to be?
Usselmann: This situation must absolutely change! We urgently need free EDA tools.
I am familiar with several on-going efforts to create free VHDL and
Verilog simulators. However, this is not enough. We need synthesis tools
that can convert the HDL descriptions to gates (or FPGA cells).
I would like to invite software developers to help us in this effort.
I will personally provide as much tech support as I can to a software
developer who is willing to help. To be fair, I should also mention that the EDA industry has been very
kind and has provided us with some limited commercial tools in our efforts.