SAN JOSE, Calif. The IEEE could start work as early as March on a plan to draft its first standard for Ethernet-based backplanes, aiming to address a broad range of computer and communications gear.
The effort, focused on 1- and 10-Gbit/s data rates, will have to come to grips with an industry split over binary versus multi-level signaling approaches to the issue.
The IEEE Backplane Ethernet Study Group had its first technical meeting in Vancouver, B.C., in January. The group hopes it could have a baseline specification established by November of this year and a final standard ratified by mid-2006.
At Vancouver, participants decided to focus on specifications for 1- and 10-Gbit Ethernet over a single lane carried over 40-inches of FR4 printed circuit board and two connectors. They agreed not to modify the existing Ethernet frame size, but tabled votes on specifying fabric topologies and on not making changes to the media access controller.
"The feeling is by early 2006 this could effectively become a standard, and I think that's reasonable. I think a lot of the right things are happening," said Bill Hoppin, vice president of marketing and strategic sales at serdes designer Accelerant Networks (Beaverton, Ore.).
But to get to a final standard the group will have to come to grips with a debate between four-level pulse amplitude modulation, a multi-level signaling (MLS) scheme favored by companies including Accelerant, Agere Systems and others and binary signaling favored by Texas Instruments, Xilinx and others.
At the Vancouver meeting, Hoppin presented on the benefits of MLS and showed demos of silicon from Accelerant and an unnamed company handling 10G Ethernet using MLS. The chips will also be demonstrated at the Tyco booth at DesignCon in Santa Clara, Calif. (Feb 2-4).
Also at the meeting, a Xilinx engineer presented the concepts behind the binary approach it favors as part of an alliance of a handful of chipmakers including TI. A spec from the so-called UXPi group is not expected until later this year.
Broadcom and Intel engineers also presented at the meeting, offering technology and market suggestions, but not demonstrating any particular technical proposal.
Engineers involved in the Optical Internetworking Forum's Common Electrical I/O standards effort also presented in Vancouver. That group aims to define short and long reach interface specifications at 6- and 11Gbit/s.
It's not clear how the OIF work might complement or overlap with the IEEE effort.
Other efforts in the area include work by the industry group PICMG (PCI Industrial Computer Manufacturers Group) that is defining a host of backplane interconnects generally at the 1-Gbit level for Ethernet, Infiniband, RapidIO, PCI Express Advanced Switching and StarGen. The backplanes are designed to serve PICMG's Advanced-TCA form factor systems.