Mountain View, CA--May 20, 1996--A verification softwarepackage called Quest II is the cornerstone of a comprehensivedesign verification architecture intended to reduce the time todebug, analyze, and emulate the design of new integratedcircuits. The package has been announced by Quickturn DesignSystems Inc. (Mountain View, CA).
The software emphasizes ease of use, in-circuit capability, andcompilation performance. Marked by an open architecture and theability to define customer-specific design flows, the packagecomprises a unified, optimized, and scalable database; a fastercompiler; tight integration with a bilingual RTL in-circuitemulation tool; an improved debugger; and a wide range of designanalysis tools.
Quickturn believes that the package may reduce compile time by afactor of five for complex designs, and similar performanceimprovement in the time required to compile incremental designchanges. The software creates a timing-correct emulation modelfor a wide variety of design-style types, both synchronous andasynchronous, and maps memories with either single or multipleports into the emulator. A new programmable target-interfacemodule eases the time and effort to interface the emulated designto the target system.
Quest II has an open database that is as much as five times ascompact as its predecessor. The compiler automaticallyrecognizes design changes and propagates them into a newemulation model. These two features allow the software toexecute several debug-fix-recompile-verify cycles per day.
In addition to a forms-driven graphical user interface, users canemploy an emulation command language, the Quickturn EmulationLanguage, based on the industry standard Tcl/Tk Tool CommandLanguage. This new tool helps users control the emulation floweasily and automate the process of compiling and emulatingdesigns.
Quickturn Design Systems, Inc.
Mountain View, CA
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