Fremont, CA--May 13, 1996--An option forViewlogic's VCS2.4 Verilog simulator, called Roadrunner, has been announced bythe High Level Design Group ofViewlogic Systems Inc. (Marlboro, MA). It is expected to improve performance of the simulator by five to 10 times. It supports all design methods with a single simulationengine, and improves the comprehensive and integrated debugsupport of VCS.
The announcement comes shortly after the company's introductionof VCS 3.0, which itself doubled the performance of VCS 2.4. Using Roadrunner and VCS 3.0, total simulation time is expectedto be reduced by 75 percent over the time required when usingversion 2.4 alone.
Karen Wills Viewlogic Systems, Inc. (508)480-0881 http://www.viewlogic.com.
Blog Doing Math in FPGAs Tom Burke 2 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...