Mountain View, CA--May 13, 1996--A concurrent architecture for dynamic random-access memories (DRAMs) allows very low latency and doubles the effective bandwidth over previous devices from the same company, Rambus Inc. The new devices are already being incorporated in new designs by several manufacturers.
Despite their high bandwidth, the new memories are as affordableas conventional DRAMs, making them an excellent memory supportfor performance-demanding, cost-effective computer and consumerproducts.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.