LAS VEGAS--June 3, 1996--Rubicad Corp.(San Jose, CA) announced two products for partitioning large layouts automatically and for compacting standard cell design hierarchies. The announcement of LACE MEGA and LACE STAR occurred at the Design Automation Conference in Las Vegas. They are based on Rubicad's existing LACE product.
LACE MEGA automatically partitions a layout without memory limitations during the compaction process and compacts the design piece-by-piece. For example, it compacts a circuit with several million transistors with automatic partitioning, or converts a circuit block of 70,000 transistors automatically without partitioning.
LACE STAR maintains the hierarchy of a standard cell layout during the compaction process. With LACE STAR a circuit made of standard cells and containing 200,000 transistors can be compacted as a single block for reuse in new designs.
LACE automatically converts existing design layouts for use with new fabs or technologies. Using it to convert an existing layout reduces time-to-market and allows design and layout engineers to optimize an existing layout for performance, power, or area utilization. IC layout conversions take one to two weeks to set up, and 20 hours of processor time to convert a typical 50,000-transistor design automatically on a Sun Sparc 20 workstation. Similar manual conversions take several man-months.
With LACE, a layout is automatically converted to follow new design rules, and new transistor and wire sizing within hours. LACE operates directly on the layout by moving through the physical layout edge-by-edge for a manual conversion. Circuit functionality, topology, and the netlist remain the same.
San Jose, CA
Fax: (408) 995-3335
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