LEDA S.A. introduced a new front-end system LV2S (LEDA VHDL*Verilog System), a compilation environment for VHDL and Verilog based applications. This front-end system allows the syntactic and semantic check of IEEE-1076 VHDL'93 descriptions and IEEE-1364 Verilog'95 descriptions, and their storage in a binary data format (the "intermediate" format) that is accessible through an ANSI-C procedural interface. LV2S includes LVS, the VHDL front-end and LVeS the Verilog one. The LVS system features a full VHDL'93 compiler that is dynamically switchable by the user to check the previous version (VHDL'87) of the IEEE 1076 standard. The LVeS system features a full Verilog compiler that follows the definition of the IEEE 1364 standard.
Each compiler integrates a Library Manager, a built-in Intermediate Format Browser, and a Reverse Analyzer reproducing a source text from the Intermediate Format.
The library manager is the same for both VHDL and Verilog compilers. A library created by the VHDL compiler has exactly the same structure as a library created by the Verilog compiler, each library being able to contain both VHDL and Verilog units. In other words, both LVS and LVeS share the same library management.
At the conceptual level, the intermediate format is a tree whose nodes, structured in different classes, possess attributes pointing to values of one of three kinds: primitive values (integer, reals, strings, enumeration values), simple links to other nodes, or list of links to other nodes. The structure of these nodes and classes is called the "schema."
The schema of the binary format generated by the VHDL compiler, i.e. the VHDL Intermediate Format (VIF), is derived from the IEEE working documents of the VIFASG. The schema of the binary format generated by the Verilog compiler, i.e. the Verilog Intermediate Format (VeIF), has been fully developed by LEDA and is largely inspired by the VIF schema definition (some VIF nodes are reused in the VeIF when there is an equivalent semantics in both languages).
The procedural interface, i.e. LEDA Procedural Interface (LPI), is a set of types and functions coded in ANSI-C that give access to the generated intermediate format. A large part of these routines doesn't depend on the schema definition but the two are exactly the same in both LVS and LVeS systems. Routines that directly depend on the schema definition include the same differences between the LVS and LVeS systems as their respective VIF and VeIF schema definitions.
For any given application, it is also possible to extend the schema of the VHDL and Verilog intermediate formats with other attributes, nodes, and classes. It allows the backannotation of compiled VHDL or Verilog units in a permanent and application-specific way.
LV2S is a general purpose front-end tool allowing easy development of application using both Verilog and VHDL languages. It is written in ANSI-C and is portable to many platforms, including small ones.
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