San Francisco, CA--September 24, 1996--Cirrus Logic Inc. introduced the first two members of its Laguna3D family of multimedia accelerators for the mainstream PC market.
These accelerators deliver more than three times the performance of current 3D solutions, with over 50 million perspective-corrected texels per second. Additionally, Laguna3D chips are the first optimized to support both the Microsoft Direct3D API for real-time 3D graphics as well as Intel's Accelerated Graphics Port (AGP).
To ensure full support for Direct3D-based applications, the new chips address all the key features of this API, including accelerated low-resolution modes, hardware arithmetic stretching, and multiple display buffering. The Laguna3D family also supports the CGL interface from Creative Labs, as well as Open GL for workstation-level applications.
Laguna3D accelerators support key 3D rendering functions in hardware, such as Gouraud shading, perspective correction, Z-buffering, texture map filtering, alpha blending, fogging, and texture decompression.
The TextureJet architecture is a powerful texture-management scheme that addresses the need to make 3D experiences more realistic through higher resolutions and faster action. By implementing a hardware texture manager and a sophisticated PCI/AGP bus mastering scheme, TextureJet architecture enables the Laguna3D chips to display an increased amount of complex textures at fluid 30fps (frames per second) motion.
While the bus master maximizes system throughput, the hardware texture manager significantly reduces the CPU-consuming need to access the frame buffer when moving textures between system memory and the 3D graphics subsystem. It achieves this by supporting 1k of texture cache for storage, and by featuring an on-chip address translation table that tracks, via dynamic random accessing, all the memory locations of textures being used.
From a memory architecture perspective, Rambus memories deliver over 600 Mbytes-per-second memory bandwidth, yet they are as affordable as conventional DRAMs, making them ideal for high-bandwidth 3D consumer applications. RDRAMs use a high-speed 8-bit-wide interface, which minimizes the number of controller pins required for the memory interface, and allows the continued use of popular 208-pin packages.
The next-generation product in the Laguna3D family, the Laguna3D-AGP accelerator (CL-GD5465), will add support for Intel's Accelerated Graphics Port. AGP will provide even higher bandwidth and lower-latency connections between the graphics subsystem and system memory, raising 3D graphics performance to workstation level.
The CL-GD5464 is packaged in a 208-pin plastic quad flat pack (PQFP) and is now shipping in volume. Cost at 10,000 units is $29.50. The Laguna3D-AGP accelerator is expected to sample in the fourth quarter of 1996 with production volumes available in the first quarter of 1997.
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