Chandler, AZ--September 16, 1996--Microchip Technology Inc. (Chandler, AZ) introduced the QuickASIC gate array family which can replace standard FPGAs and CPLDs with a masked ASIC at a substantially reduced price per unit, compared to programmable logic devices, and no non-recurring engineering (NRE) charges. Microchip's debut in the gate array conversion market follows its June acquisition of ASIC Technical Solutions Inc. (San Jose, CA).
Microchip's QuickASIC family offers turnkey digital design conversion of any FPGA/CPLD device by transforming its net list into a masked ASIC--with very fast lead times of less than four weeks from design signoff to prototypes. QuickASIC devices provide drop-in functional pin-for-pin replacement of FPGAs/CPLDs; seven array sizes ranging from 2k to 84 kgates; 84-304 pads offering completely user-definable pin-outs; fewer than 7 ns typically (from input through a flip-flop to output); and 2.7 to 5.5 V operation. The company's Zero-NRE program eliminates the NRE costs charged by traditional ASIC manufacturers and includes one free design turn.
By providing a simple, low-risk, low-cost method of converting to a masked ASIC in a few weeks, QuickASIC devices can be used for any application prototyping with FPGAs/CPLDs, including multimedia, data communications, telecommunications, and computer peripherals. Microchip's current QuickASIC gate array conversion customers include Analog Devices, Hewlett-Packard, and Xerox.
QuickASIC will support all popular packaging types, including SOIC, PLCC, PDIP, PQFP, TQFP, and VQFP. Available today in 5,000-piece minimum quantities, pricing for QuickASIC ranges from $4-6 per device for 2 kgates to $20-28 per device for 84 kgates.
Microchip Technology Inc.
2355 W. Chandler Blvd.
Chandler, AZ 85224
Fax: (602) 899-9210
Return to Headlines