San Jose, CA--November 25, 1996--LogicVision Inc. (San Jose, CA) announced their first automated built-in self-test (BIST) technology for embedded DRAM. This technology addresses the challenge of testing embedded DRAMs. LogicVision's solution includes a single, small BIST controller that supports DRAM, SRAM, and ROM for low-overhead embedded testing.
To address DRAM specifically, LogicVision redesigned its BIST controller to include checkerboard algorithms and combined these with SMARCH algorithms for a comprehensive test of DRAM. The checkerboard algorithms ensure high-quality testing by accurately mapping logical data to physical data. The checkerboard algorithms also add to the defect coverage of SMARCH algorithms by testing the refresh operation of the DRAMs to verify retention of logic values.
LogicVision's memory BIST consists of a single, RTL-based BIST controller that implements the BIST technology; automation tools for automatically configuring and inserting the controller into a user's design; and usage tools that integrate the controller into higher-level packages and systems. This solution shields the user from the complexity of BIST implementation.
LogicVision's DRAM BIST technology is an option to their ICRAMBIST and ICBIST products and is licensed on a per-design basis. License fees start at $25,000 per design for the first three designs. It will be available March 1997 on Hewlett-Packard and Sun SPARC industry-standard platforms.
101 Metro Dr. Third Floor
San Jose, CA 95110
Fax: (408) 453-0150
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