Kanata, Ontario--March 28, 1997--DY 4 Systems Inc. (Kanata, Ontario) announced the availability of its guaranteed-by-design, third-generation PowerPC 603e based products. Designated SVME/DMV-177, these single-board computers (SBC) combine Motorola's 100 MHz RISC processor with DY 4's recognized ability to deliver high-reliability, mission-critical subsystems.
The 176 and 177 are designed for harsh environments where operating temperatures ranging from -55 degrees C to +85 degrees C, and shock and vibration in excess of 40g and 0.1g2 per Hz are encountered. In terms of deployed systems, these limits equate to withstanding the shock generated by the firing of a 105mm cannon or the vibration experienced on an attack helicopter. To meet the widest range of program cost/performance criteria, four ruggedization levels are available, including air-cooled and conduction-cooled versions.
The 176 and 177 use a common base design which is populated with either SRAM, up to 16 Mbytes on the 176 or DRAM with EDC, up to 64 Mbytes on the 177. Features of the 176 and 177 include Ethernet, SCSI-2, serial channels, four timers, and separate execution ROM and boot memory. Up to four serial channels are included, with DMA capability on two, to off-load the PowerPC microprocessor. I/O can be further expanded by the addition of MAXPack mezzanine modules such as twin, dual-redundant MIL-STD-1153B for complete subsystem functionality on a single board. Flash EPROM memory consists of 8 Mbytes of 64-bit executable ROM for application code and 2 Mbytes of boot ROM for secure program storage. Additionally, 256 kbytes of EEPROM memory is available.
Both the 176 and 177 products are available for delivery as early as six to eight weeks using DY 4's bonded CORE inventory program. Pricing for the 176 and 177 start at $7,500.
DY 4 Systems
Fax: (613) 599-7777
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Cupertino, CA--March 26, 1997--The Open Model Forum (OMF; Cupertino, CA) announced that the IEEE has approved its Project Authorization Request (PAR).
The IEEE has agreed to adopt OMF's Open Model Interface (OMI) specification that defines a standard simulator interface to support models developed in VHDL, Verilog, and C hardware description languages.
The OMI specification will be used as the basis of the IEEE standard which is expected to be completed in 1997. The OMI specification, developed to provide a simulator independent interface for complex IC models, improves model availability, streamlines distribution, and reduces development costs.
The creation of an open procedural interface to simulators permits OMI-compliant simulator regardless of the language in which the models are developed. Version 1.0 of the OMI specification is currently available for the public to review.
Open Model Forum
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