Palo Alto, CA--March 24, 1997--Systems Science Inc. (Palo Alto, CA) announced the release of a self-checking, transaction-based PCI library. This library is used to verify PCI-based designs which are described in Verilog-HDL, under a Vera Verification System. The PCI library, which is written in the object-oriented, Vera hardware verification language (HVL) contains bus transactors, and models for PCI devices and for a central arbiter.
The main benefit of using a Vera-PCI library within a Vera/Verilog environment is that it allows verifying PCI designs 4-10 times faster than it would take in a pure Verilog environment. Also, it allows engineers to create much more thorough test cases, resulting in better quality products. PCI checks and functions are easy to create since only a few tasks from the library are needed in most cases--and the PCI bus protocols are automatically checked by these transactors.
Some of the companies using Vera include Sun, Cisco, NEC, and Xylan.
Vera is used to validate blocks, ICs, and full systems. It works with Verilog, without any changes in the circuit description. Testbenches are described in Vera-HVL, while the circuit is described in Verilog-HDL. Communication between Vera and Verilog takes place transparently during the simulation.
The PCI Library is available both in binary and souce form, and is used to verify from PCI components to complete PCI systems, with the designs being described in Verilog-HDL.
The Vera-PCI Verification Library is available now from Systems Science. U.S. list prices start at $2,000 for binary, floating-licenses, and $14,000 for source licenses.
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