Santa Clara, CA--May 29, 1997--Synergy Semiconductor (Santa Clara, CA) announced the addition of three new Phase Locked Loops (PLLs) to its ClockWorks family tree of clock generation and distribution chips.
The wideband PLLs, which feature less than 10ps RMS jitter and less than 200ps skew across the entire frequency range of 25 MHz to over 1 GHz, are now part of ClockWorks' solution for designing high-performance clock systems.
Each of the new products offers programming flexibility, differential design, and low power in 3V and/or 5V. Model number SY89420VJC features dual PLLs with a frequency doubler mode packaged in 28-pin PLCC; SY89421VZC provides a high-performance PLL with external 2.5 GHz VCO input capability packaged in 20-pin SOIC; and SY89423VJC offers dual high-performance PLLs with external 2.5 GHz VCO input capability and a frequency doubler mode packaged in 44-pin PLCC.
The ClockWorks family consists of a range of standard ICs in five categories including frequency synthesizers, clock generators, clock distribution and drivers, programmable delay lines, and PLLs. All members of the family interface with each other through PECL (positive ECL), and with other system ICs through TTL. Thousand-piece quantity prices are as follows: SY89420VJC, $23.05; SY89421VZC, $22.45; and SY89423VJC, $26.75.
Santa Clara, CA
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