Pocatello, Idaho--June 16, 1997--American Microsystems Inc. (AMI; Pocatello, Idaho) announced that its CWL 0.8-m, single poly, double metal, mixed-signal process will be offered by MOSIS (Marina del Rey, Calif.). AMI has also been selected by MOSIS to provide its 1.2-m design process.
AMI's 0.8-m process will replace Hewlett-Packard's CMOS34/AMOSI process. AMI has been working with HP to ensure a smooth transition. The CWL process has an additional layer, "poly cap," for making high-quality linear capacitors. This layer is under the first poly and similar to the diffused capacitor of the AMOSI process.
AMI also provides MOSIS with the 1.2-m process (ABN). The 1.2-m process is a double poly, double metal process with the NPN option for both 5 V and 10 V applications.
The next 1.2-m process run is scheduled for September. The 0.8-m process technology will be available in October. MOSIS is currently surveying its customers to determine if an accelerated schedule is required.
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