San Jose--Aug. 25, 1997--A multi-million dollar agreement signed last year between Motorola Semiconductor Product Sector (SPS) and Cadence Design Systems Inc. (San Jose) has resulted in the delivery of Motorola's SCORPION multimedia chip.
This agreement extended Motorola's relationship with Cadence by standardizing its design teams on Cadence's Alta application-specific, system-level methodology for the design and creation of wireless and multimedia systems-on-silicon and chip sets. Motorola is using the Alta SPW environment as a vehicle to accelerate the delivery of system-level digital signal processing core models. This adoptation has been key to Motorola's development process and ability to service it's customers.
Motorola SPS's SCORPION project was completed in approximately six months using Cadence's Alta system-level methodology. The SPW design environment was used to create and test a virtual prototype of the Motorola Graphics Engine chip before implementation. The original Graphics Engine design was targeted to a FPGA, placed on a printed circuit board for rapid prototyping and run in a test facility. Testing involved a real video source feeding the design while designers verified the image on screen. Once designers were satisfied with the design, it was retargeted.
Because the SPW design environment supports parameterized libraries, the development team was able to reuse portions of the previous design of the Graphic Engine. SPW provided the front-end environment to capture and reuse specific blocks from the Graphics Engine to simulate the entire SCORPION chip, and then to generate VHDL or Verilog HDL for synthesis. From synthesis, the design was targeted to a Motorola submicron technology.
The completion of the SCORPION project underscores Motorola's ongoing commitment to Cadence's Alta system-level design methodology. The methodology has been used successfully within Motorola for virtual prototyping before silicon implementation and design reuse, as well as for intellectual property delivery to customers.
Cadence Design Systems
San Jose, CA
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