San Jose--Sept. 29, 1997 - GEC Plessey Semiconductors (GPS; San Jose) announced a new family of Embedded Controller ASICs. The Embedded Controller ASIC technology provides a single-chip development platform that integrates an ARM7TDMI processor core, system support functions, and customer-defined logic within an embedded array. The fully supported and proven controller design uses GPS' high-density sea-of-gates gate array technology. This enables controller integration while providing a range from 20,000 to 2 million used gates for application-specific logic. GPS' Embedded Controller architecture reduces time-to-market by allowing engineers to focus on early development of custom logic for a range of applications across the communications, consumer, and computing markets.
The Embedded Controller is designed using GPS' embedded array technology to integrate system support functions including memory, peripheral interfaces, interrupt controllers, timers, UARTs, and DMA controllers, on a single-chip common platform. The company eases design and integration by providing customers with an emulation model of the microcontroller as well as a board for FPGA application development. Customers can prototype on the board before up-integrating into silicon once the design is tested and proven.
The Embedded Controller technology, proven by internal standard product design, reduces time-to-market by allowing customers to define in advance the core embedded functions and pin-out. The base layers can then be manufactured in parallel with fine tuning of the gate array design. After final verification, only the metal layers remain to be fabricated. This not only speeds time-to-market, but also allows customers the flexibility to produce multiple variants of a design for specific applications at a reduced incremental cost.
The Embedded Controller family is offered within the standard ASIC design flows supported by GPS, centered around Verilog and VHDL/Vital, with sign-off simulation available on Cadence Verilog, Mentor Quicksim, and Synopsys VSS. Also available are a timing model for Synopsys Design compiler and full test patterns for the Embedded Controllers.
A complete set of hardware and software development tools is available to aid designers in the development and debugging of target applications. GPS' Software Interface Function (SIF) library provides designers with high-level functions to dramatically ease code development for the Embedded Microcontroller. The company also offers a Software Development Toolkit equipped with an industry standard optimizing "C" compiler and assembler for both the ARM and Thumb code, a linker, and a Microsoft Windows-based debugger. The debugger can interface to a software simulation environment and to a resident debug monitor, or directly to the processor via a JTAG interface unit in the target hardware environment.
The Embedded Controller product is available for design in both 0.6(m and 0.35(m technologies. Non-recurring engineering charges for the Embedded Controller product typically range from $150,000 to $250,000.
GEC Plessey Semiconductors
1735 Technology Dr. Suite 240
San Jose, CA 95110
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