Synopsys Announces Design Software Support for New Xilinx Virtex Family of FPGAs
Mountain View, Calif.--Nov. 24, 1997--Synopsys Inc. (Mountain View) announced synthesis design software support for Xilinx's next-generation Virtex family of FPGAs.
The newly announced Virtex FPGA architecture will deliver densities of more than one million system gates. To exploit the highdensities and performance available in leading edge FPGAs, such as the Virtex family, IC designers are adapting and applying design methodologies and tools traditionally associated with ASICs to FPGA design.
To ensure the Virtex family would allow for efficient use of high-level design methods, Xilinx used Synopsys FPGA Compiler synthesis tool for architectural exploration and validation.
Synopsys and Xilinx are in the fourth year of a five-year, successful technology alliance. Timely support of the Virtex family in Synopsys' synthesis products is a result of a close cooperation and alignment of product road maps between the two companies. Virtex support is available now through Synopsys' FPGA Compiler and Design Compiler products. Optimized Virtex synthesis libraries for FPGA Compiler and Design Compiler are available through Xilinx.
Synopsys' FPGA Express, which offers architecture-specific synthesis algorithms for Windows 95 and NT, will also support Virtex when Xilinx releases PC-based place-and-route tools for the device family. FPGA Express features a constraint-driven flow allowing designers to precisely control the Xilinx M1 place and route software.
Mountain View, CA
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