Altera Delivers Fast, 3.3-V, 100,000-Gate PLD
San Jose--Nov. 17, 1997(Altera Corp. (San Jose) announced the availability of its new 100,000-gate EPF10K100A programmable logic device (PLD). The EPF10K100A, the newest member of Altera's 3.3-V FLEX 10KA family, operates as much as 50 percent faster than its 5-V counterpart over a broad range of benchmarks, and is ideal for applications requiring a combination of high density and high performance.
The EPF10K100A is built on a 0.35-(m four-layer metal SRAM process that enables the smallest possible die size. It contains 4,992 logic elements and 24,576 bits of on-chip RAM. This 0.35(m process is optimized for 3.3-V operation, which ensures lower power consumption without sacrificing performance.
The EPF10K100A provides simple pin migration--for example, an EPF10K100A in a 240-pin QFP package is pin-compatible with five existing FLEX 10K devices, which allows engineers to move up or down the density spectrum without modifying their PCB layout.
All FLEX 10K devices are supported by Altera's MAX+PLUS II development system for PC and workstation platforms. The MAX+PLUS II software offers an architecture independent development environment, which enables the designer to target designs to any of Altera's device families. MAX+PLUS II software provides seamless integration with tools from Cadence, Exemplar, Mentor Graphics, Synopsys, Synplicity, Viewlogic, and other EDA vendors.
The EPF10K100A is available now in a 240-pin QFP package and is priced at $199 each in quantities of 100. A 356-pin BGA package is expected to be available by the end of 1997. By mid-1998, the EPF10K100A in a 240-pin QFP package is expected to sell for $60 in high volume.
San Jose, CA
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