Cupertino, Calif.--Dec. 18, 1997--Ikos Systems announced the results of a successful collaboration with Panasonic AVC AmericanLaboratories, Inc. in the verification of its digital high-definitiontelevision (HDTV) ASIC design.
Using Ikos's Voyager VHDL simulation tools and NSIM accelerator incombination with the verification expertise of Ikos's consulting services organization, the PAVCAL design group was able to reduce itssimulation times from days to hours.
Ikos consulting engineers worked on-site at PAVCAL's Burlington, N.J. facility to establish a design verification environment integrating several EDA technologies used in the lab's design process. Working with the Panasonic team, IKOS consulting engineers helped them achieve an 85( improvement in their gate-level simulations and 10( over RTL-level simulations. The combined verification team of PAVCAL and Ikos design experts was able to simulate frames of over two million pixels each, a feat not possible with software simulation solutions.
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