Santa Clara, Calif.--March 24, 1998--Mentor Graphics Corp. (Wilsonville, Ore.) introduced an innovative business and technology model enabling IP developers and users to rapidly move IP into a system-on-chip (SOC) design process. The M.IP Engine offers the electronics industry a means to reduce the guesswork and design iterations that hinder efficient integration of commercial IP. It also enables design teams to cost-effectively andquickly add more functionality to advanced chips for consumer, computer, and communications markets.
The M.IP Engine closely links the two sides of block-based design--IPcreation and design process--to achieve IP-based design. It provides IPcreators and IP users with an integrated package of technology and services that tightly couples IP development and implementation on silicon through a rapid, seamless process.
At the center of the engine is the IP Quickuse Methodology, enabling standards-based design-for-reuse and integration and the IP QuickusePlatform, a repository of productized IP that designers may download andevaluate. On the input side, M.IP Engine components include IP products, both internally created and sourced from third parties, and the IP Factory,which productizes reusable IP. On the output side of the M.IP Engine, the IP Quickuse Platform enables seamless integration of the IP with all existing EDA design and process technology environments. To easily access and use IP, the M.IP Engine offers advanced IP distribution systems based on Web technology, and system integration and IP consulting.
8005 S.W. Boeckman Rd.
Wilsonville, OR 97070-7777
Return to Headlines