Santa Clara, Calif.--March 23, 1998--Escalade Corp. (Santa Clara, Calif.) andPalmchip Corp.(San Jose) jointly announced that Palmchip Corp. will bundle itsportfolio of silicon intellectual property (SIP) cores within Escalade's Designbooksoftware.The solution gives designers a process for easily evaluating Palmchip's SIP cores and unique Coreframe on-chip architecture. Designbook is able to protectthe value of the core throughout the evaluation process because of its flexibledisclosure and protection mechanisms.
This announcement follows a joint marketing agreement signed between Palmchipand Escalade in June 1997. Under the terms of the agreement, Escaladeprovides time-licensed, fully functioning demonstration copies of Designbook toPalmchip for its use in the promotion, evaluation, and sales of its IP cores.
The Coreframe architecture standardizes signal interfacing and allows siliconintellectual property blocks to be combined together. Designbook is used to create a showcase system to quickly start both IP evaluation and end-use with levels of informationdisclosure selectable by the IP vendor. The sample system gives the SOCdesigner a "live," interactive, and graphical mechanism to more quicklyunderstand and evaluate an IP vendor's cores.
The CD-ROM media used today by Palmchip will soon be complemented by Web-basedoptions. The agreement also calls for a host of innovative promotionalactivities surrounding solutions for systems-on-a-chip designers.
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