Santa Clara, Calif.--March 23, 1998--Sand Microelectronics, Inc. (San Jose),introduced its first synthesizable IEEE-1394 cores: 1394DC, adevice controller core, and 1394 CPHY, a digital cable-PHY core. Thecompany is also introducing its Sand Designer ADVantage 1394 Design ToolKit with an IEEE-1394 simulation model, synthesizable IEEE-1394 cores, andIEEE-1394 design aids.
Sand's IEEE-1394 cores and tool kit benefit companies that are moving intothe IEEE-1394 market. The cores were developed to allow designers to targetmultiple foundries. The 1394DC core is silicon-proven.
Sand offers a synthesizable IEEE-1394 simulation model, synthesizableIEEE-1394 cores, and IEEE-1394 design aids. The cores include Sand'sRapidscript utility, which enables fast, error-free core configuration tospecific customer requirements. Sand's IEEE-1394 cores allow designers to design IEEE-1394 products with speeds up to 400 Mbytes/s. Sand's IEEE-1394 cores have a low gate count. Approximate gate count for the 1394DC core is 15,000 gates and for the 1394 CPHY, 10,000 gates.
The 1394DC core consists of a link layer and asynchronous and isochronousinterfaces that are customizable using Sand's Rapidscript. Rapidscript isalso used to customize the number of ports for the 1394 CPHY controller core. Sand's cores and models are compliant with the IEEE-1394 standard.
Sand has been shipping its IEEE-1394 simulation model since April 1997. Thesynthesizable IEEE-1394 cores and the IEEE-1394 Sand Designer ADVantageTool Kit ship next month. Cores are available in Verilog and VHDL, andsynthesizable Verilog or VHDL source code is available.Contact Sand for information on pricing and licensing.
San Jose, CA 95131
Fax: (408) 321-8201
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