Silicon Architects of Synopsys Delivers Industry's Largest Silicon Library in New CBAII Technology
March 18, 1998--Silicon Architects of Synopsys announced a synthesis-rich silicon library with over 1,000 logic cells implemented in its new CBAII technology. The complete CBAII technology solution includes the core library, memory compilers, and fine-pitch I/Os. A significant enhancement to the density-efficient cell-based array (CBA) technology, CBAII is further optimized for deep-submicron designs--0.25-(m and smaller--and provides greater than 15 percent increase in density over CBA. CBAII is an ideal platform for design reuse, providing a smooth embedding process to host legacy intellectual property (IP) and ensuring predictability for soft IP by hardening it to enable portability for subsequent implementations. The capabilities of this new technology allow customers to get more chips from each wafer faster, maximizing CBA customers' return on investment.
System-on-a-chip design is dependent on design reuse, which is dependent upon IP portability. Features of the CBAII architecture and common library ensure that designs implemented in CBAII are inherently portable. Implementing designs in the CBAII technology offers unique advantages for several types of IP. The smooth tool flow makes CBAII an ideal platform for embedding and reusing legacy IP. The performance of soft IP is more predictable in all CBAII libraries, once it has been implemented in one CBAII library. For these "hardened" soft IP blocks, CBAII permits portability across all CBAII processes, providing IP developers with an efficient method of design reuse.
Another key success factor to SoC design is the ability to maximize utilization of silicon. CBAII architecture delivers better density through a library optimized for four or more metal layers that leverages a redesigned cell layout to support stacked vias and salicide semiconductor processes. In addition, the CBAII library provides optimized cell sets for high performance and low power, including views for Synopsys Power Compiler and Synopsys Designpower. CBAII further reduces chip development costs through metal programmability, which speeds turn times for engineering change orders and allows for rapid development of derivative products.
Return to Headlines